Lines Matching full:data1
541 uint32_t def, data, def1, data1; in mmhub_v2_0_update_medium_grain_clock_gating() local
547 def1 = data1 = RREG32_SOC15(MMHUB, 0, mmDAGB0_CNTL_MISC2_Sienna_Cichlid); in mmhub_v2_0_update_medium_grain_clock_gating()
551 def1 = data1 = RREG32_SOC15(MMHUB, 0, mmDAGB0_CNTL_MISC2); in mmhub_v2_0_update_medium_grain_clock_gating()
558 data1 &= ~(DAGB0_CNTL_MISC2__DISABLE_WRREQ_CG_MASK | in mmhub_v2_0_update_medium_grain_clock_gating()
568 data1 |= (DAGB0_CNTL_MISC2__DISABLE_WRREQ_CG_MASK | in mmhub_v2_0_update_medium_grain_clock_gating()
581 if (def1 != data1) in mmhub_v2_0_update_medium_grain_clock_gating()
582 WREG32_SOC15(MMHUB, 0, mmDAGB0_CNTL_MISC2_Sienna_Cichlid, data1); in mmhub_v2_0_update_medium_grain_clock_gating()
587 if (def1 != data1) in mmhub_v2_0_update_medium_grain_clock_gating()
588 WREG32_SOC15(MMHUB, 0, mmDAGB0_CNTL_MISC2, data1); in mmhub_v2_0_update_medium_grain_clock_gating()
652 int data, data1; in mmhub_v2_0_get_clockgating() local
661 data1 = RREG32_SOC15(MMHUB, 0, mmDAGB0_CNTL_MISC2_Sienna_Cichlid); in mmhub_v2_0_get_clockgating()
665 data1 = RREG32_SOC15(MMHUB, 0, mmDAGB0_CNTL_MISC2); in mmhub_v2_0_get_clockgating()
671 !(data1 & (DAGB0_CNTL_MISC2__DISABLE_WRREQ_CG_MASK | in mmhub_v2_0_get_clockgating()