Lines Matching +full:pre +full:- +full:emphasis
2 * Copyright 2007-8 Advanced Micro Devices, Inc.
32 #include "atom-bits.h"
62 struct drm_device *dev = chan->dev; in amdgpu_atombios_dp_process_aux_ch()
72 mutex_lock(&chan->mutex); in amdgpu_atombios_dp_process_aux_ch()
74 base = (unsigned char *)(adev->mode_info.atom_context->scratch + 1); in amdgpu_atombios_dp_process_aux_ch()
81 args.v2.ucChannelID = chan->rec.i2c_id; in amdgpu_atombios_dp_process_aux_ch()
83 args.v2.ucHPD_ID = chan->rec.hpd; in amdgpu_atombios_dp_process_aux_ch()
85 amdgpu_atom_execute_table(adev->mode_info.atom_context, index, (uint32_t *)&args); in amdgpu_atombios_dp_process_aux_ch()
91 r = -ETIMEDOUT; in amdgpu_atombios_dp_process_aux_ch()
98 r = -EIO; in amdgpu_atombios_dp_process_aux_ch()
105 r = -EIO; in amdgpu_atombios_dp_process_aux_ch()
118 mutex_unlock(&chan->mutex); in amdgpu_atombios_dp_process_aux_ch()
136 if (WARN_ON(msg->size > 16)) in amdgpu_atombios_dp_aux_transfer()
137 return -E2BIG; in amdgpu_atombios_dp_aux_transfer()
139 tx_buf[0] = msg->address & 0xff; in amdgpu_atombios_dp_aux_transfer()
140 tx_buf[1] = msg->address >> 8; in amdgpu_atombios_dp_aux_transfer()
141 tx_buf[2] = (msg->request << 4) | in amdgpu_atombios_dp_aux_transfer()
142 ((msg->address >> 16) & 0xf); in amdgpu_atombios_dp_aux_transfer()
143 tx_buf[3] = msg->size ? (msg->size - 1) : 0; in amdgpu_atombios_dp_aux_transfer()
145 switch (msg->request & ~DP_AUX_I2C_MOT) { in amdgpu_atombios_dp_aux_transfer()
151 tx_size = HEADER_SIZE + msg->size; in amdgpu_atombios_dp_aux_transfer()
152 if (msg->size == 0) in amdgpu_atombios_dp_aux_transfer()
156 memcpy(tx_buf + HEADER_SIZE, msg->buffer, msg->size); in amdgpu_atombios_dp_aux_transfer()
161 ret = msg->size; in amdgpu_atombios_dp_aux_transfer()
169 if (msg->size == 0) in amdgpu_atombios_dp_aux_transfer()
174 tx_buf, tx_size, msg->buffer, msg->size, delay, &ack); in amdgpu_atombios_dp_aux_transfer()
177 ret = -EINVAL; in amdgpu_atombios_dp_aux_transfer()
182 msg->reply = ack >> 4; in amdgpu_atombios_dp_aux_transfer()
189 amdgpu_connector->ddc_bus->rec.hpd = amdgpu_connector->hpd.hpd; in amdgpu_atombios_dp_aux_init()
190 amdgpu_connector->ddc_bus->aux.transfer = amdgpu_atombios_dp_aux_transfer; in amdgpu_atombios_dp_aux_init()
191 drm_dp_aux_init(&amdgpu_connector->ddc_bus->aux); in amdgpu_atombios_dp_aux_init()
192 amdgpu_connector->ddc_bus->has_aux = true; in amdgpu_atombios_dp_aux_init()
284 return -EINVAL; in amdgpu_atombios_dp_get_dp_link_config()
301 amdgpu_atom_execute_table(adev->mode_info.atom_context, index, (uint32_t *)&args); in amdgpu_atombios_dp_encoder_service()
307 struct drm_device *dev = amdgpu_connector->base.dev; in amdgpu_atombios_dp_get_sinktype()
311 amdgpu_connector->ddc_bus->rec.i2c_id, 0); in amdgpu_atombios_dp_get_sinktype()
316 struct amdgpu_connector_atom_dig *dig_connector = amdgpu_connector->con_priv; in amdgpu_atombios_dp_probe_oui()
319 if (!(dig_connector->dpcd[DP_DOWN_STREAM_PORT_COUNT] & DP_OUI_SUPPORT)) in amdgpu_atombios_dp_probe_oui()
322 if (drm_dp_dpcd_read(&amdgpu_connector->ddc_bus->aux, DP_SINK_OUI, buf, 3) == 3) in amdgpu_atombios_dp_probe_oui()
326 if (drm_dp_dpcd_read(&amdgpu_connector->ddc_bus->aux, DP_BRANCH_OUI, buf, 3) == 3) in amdgpu_atombios_dp_probe_oui()
333 struct amdgpu_connector_atom_dig *dig_connector = amdgpu_connector->con_priv; in amdgpu_atombios_dp_ds_ports()
336 if (dig_connector->dpcd[DP_DPCD_REV] > 0x10) { in amdgpu_atombios_dp_ds_ports()
337 ret = drm_dp_dpcd_read(&amdgpu_connector->ddc_bus->aux, in amdgpu_atombios_dp_ds_ports()
339 dig_connector->downstream_ports, in amdgpu_atombios_dp_ds_ports()
342 memset(dig_connector->downstream_ports, 0, in amdgpu_atombios_dp_ds_ports()
349 struct amdgpu_connector_atom_dig *dig_connector = amdgpu_connector->con_priv; in amdgpu_atombios_dp_get_dpcd()
353 ret = drm_dp_dpcd_read(&amdgpu_connector->ddc_bus->aux, DP_DPCD_REV, in amdgpu_atombios_dp_get_dpcd()
356 memcpy(dig_connector->dpcd, msg, DP_DPCD_SIZE); in amdgpu_atombios_dp_get_dpcd()
358 DRM_DEBUG_KMS("DPCD: %*ph\n", (int)sizeof(dig_connector->dpcd), in amdgpu_atombios_dp_get_dpcd()
359 dig_connector->dpcd); in amdgpu_atombios_dp_get_dpcd()
366 dig_connector->dpcd[0] = 0; in amdgpu_atombios_dp_get_dpcd()
367 return -EINVAL; in amdgpu_atombios_dp_get_dpcd()
378 if (!amdgpu_connector->con_priv) in amdgpu_atombios_dp_get_panel_mode()
383 if (drm_dp_dpcd_readb(&amdgpu_connector->ddc_bus->aux, in amdgpu_atombios_dp_get_panel_mode()
393 } else if (connector->connector_type == DRM_MODE_CONNECTOR_eDP) { in amdgpu_atombios_dp_get_panel_mode()
395 if (drm_dp_dpcd_readb(&amdgpu_connector->ddc_bus->aux, in amdgpu_atombios_dp_get_panel_mode()
412 if (!amdgpu_connector->con_priv) in amdgpu_atombios_dp_set_link_config()
414 dig_connector = amdgpu_connector->con_priv; in amdgpu_atombios_dp_set_link_config()
416 if ((dig_connector->dp_sink_type == CONNECTOR_OBJECT_ID_DISPLAYPORT) || in amdgpu_atombios_dp_set_link_config()
417 (dig_connector->dp_sink_type == CONNECTOR_OBJECT_ID_eDP)) { in amdgpu_atombios_dp_set_link_config()
418 ret = amdgpu_atombios_dp_get_dp_link_config(connector, dig_connector->dpcd, in amdgpu_atombios_dp_set_link_config()
419 mode->clock, in amdgpu_atombios_dp_set_link_config()
420 &dig_connector->dp_lane_count, in amdgpu_atombios_dp_set_link_config()
421 &dig_connector->dp_clock); in amdgpu_atombios_dp_set_link_config()
423 dig_connector->dp_clock = 0; in amdgpu_atombios_dp_set_link_config()
424 dig_connector->dp_lane_count = 0; in amdgpu_atombios_dp_set_link_config()
437 if (!amdgpu_connector->con_priv) in amdgpu_atombios_dp_mode_valid_helper()
439 dig_connector = amdgpu_connector->con_priv; in amdgpu_atombios_dp_mode_valid_helper()
441 ret = amdgpu_atombios_dp_get_dp_link_config(connector, dig_connector->dpcd, in amdgpu_atombios_dp_mode_valid_helper()
442 mode->clock, &dp_lanes, &dp_clock); in amdgpu_atombios_dp_mode_valid_helper()
456 struct amdgpu_connector_atom_dig *dig = amdgpu_connector->con_priv; in amdgpu_atombios_dp_needs_link_train()
458 if (drm_dp_dpcd_read_link_status(&amdgpu_connector->ddc_bus->aux, link_status) in amdgpu_atombios_dp_needs_link_train()
461 if (drm_dp_channel_eq_ok(link_status, dig->dp_lane_count)) in amdgpu_atombios_dp_needs_link_train()
472 if (!amdgpu_connector->con_priv) in amdgpu_atombios_dp_set_rx_power_state()
475 dig_connector = amdgpu_connector->con_priv; in amdgpu_atombios_dp_set_rx_power_state()
478 if (dig_connector->dpcd[0] >= 0x11) { in amdgpu_atombios_dp_set_rx_power_state()
479 drm_dp_dpcd_writeb(&amdgpu_connector->ddc_bus->aux, in amdgpu_atombios_dp_set_rx_power_state()
503 amdgpu_atombios_encoder_setup_dig_transmitter(dp_info->encoder, in amdgpu_atombios_dp_update_vs_emph()
505 0, dp_info->train_set[0]); /* sets all lanes at once */ in amdgpu_atombios_dp_update_vs_emph()
508 drm_dp_dpcd_write(dp_info->aux, DP_TRAINING_LANE0_SET, in amdgpu_atombios_dp_update_vs_emph()
509 dp_info->train_set, dp_info->dp_lane_count); in amdgpu_atombios_dp_update_vs_emph()
529 amdgpu_atombios_encoder_setup_dig_encoder(dp_info->encoder, rtp, 0); in amdgpu_atombios_dp_set_tp()
532 drm_dp_dpcd_writeb(dp_info->aux, DP_TRAINING_PATTERN_SET, tp); in amdgpu_atombios_dp_set_tp()
538 struct amdgpu_encoder *amdgpu_encoder = to_amdgpu_encoder(dp_info->encoder); in amdgpu_atombios_dp_link_train_init()
539 struct amdgpu_encoder_atom_dig *dig = amdgpu_encoder->enc_priv; in amdgpu_atombios_dp_link_train_init()
543 amdgpu_atombios_dp_set_rx_power_state(dp_info->connector, DP_SET_POWER_D0); in amdgpu_atombios_dp_link_train_init()
546 if (dp_info->dpcd[3] & 0x1) in amdgpu_atombios_dp_link_train_init()
547 drm_dp_dpcd_writeb(dp_info->aux, in amdgpu_atombios_dp_link_train_init()
550 drm_dp_dpcd_writeb(dp_info->aux, in amdgpu_atombios_dp_link_train_init()
553 if (dig->panel_mode == DP_PANEL_MODE_INTERNAL_DP2_MODE) in amdgpu_atombios_dp_link_train_init()
554 drm_dp_dpcd_writeb(dp_info->aux, DP_EDP_CONFIGURATION_SET, 1); in amdgpu_atombios_dp_link_train_init()
557 tmp = dp_info->dp_lane_count; in amdgpu_atombios_dp_link_train_init()
558 if (drm_dp_enhanced_frame_cap(dp_info->dpcd)) in amdgpu_atombios_dp_link_train_init()
560 drm_dp_dpcd_writeb(dp_info->aux, DP_LANE_COUNT_SET, tmp); in amdgpu_atombios_dp_link_train_init()
563 tmp = drm_dp_link_rate_to_bw_code(dp_info->dp_clock); in amdgpu_atombios_dp_link_train_init()
564 drm_dp_dpcd_writeb(dp_info->aux, DP_LINK_BW_SET, tmp); in amdgpu_atombios_dp_link_train_init()
567 amdgpu_atombios_encoder_setup_dig_encoder(dp_info->encoder, in amdgpu_atombios_dp_link_train_init()
571 drm_dp_dpcd_writeb(dp_info->aux, in amdgpu_atombios_dp_link_train_init()
584 drm_dp_dpcd_writeb(dp_info->aux, in amdgpu_atombios_dp_link_train_finish()
589 amdgpu_atombios_encoder_setup_dig_encoder(dp_info->encoder, in amdgpu_atombios_dp_link_train_finish()
603 memset(dp_info->train_set, 0, 4); in amdgpu_atombios_dp_link_train_cr()
610 dp_info->tries = 0; in amdgpu_atombios_dp_link_train_cr()
613 drm_dp_link_train_clock_recovery_delay(dp_info->dpcd); in amdgpu_atombios_dp_link_train_cr()
615 if (drm_dp_dpcd_read_link_status(dp_info->aux, in amdgpu_atombios_dp_link_train_cr()
616 dp_info->link_status) <= 0) { in amdgpu_atombios_dp_link_train_cr()
621 if (drm_dp_clock_recovery_ok(dp_info->link_status, dp_info->dp_lane_count)) { in amdgpu_atombios_dp_link_train_cr()
626 for (i = 0; i < dp_info->dp_lane_count; i++) { in amdgpu_atombios_dp_link_train_cr()
627 if ((dp_info->train_set[i] & DP_TRAIN_MAX_SWING_REACHED) == 0) in amdgpu_atombios_dp_link_train_cr()
630 if (i == dp_info->dp_lane_count) { in amdgpu_atombios_dp_link_train_cr()
635 if ((dp_info->train_set[0] & DP_TRAIN_VOLTAGE_SWING_MASK) == voltage) { in amdgpu_atombios_dp_link_train_cr()
636 ++dp_info->tries; in amdgpu_atombios_dp_link_train_cr()
637 if (dp_info->tries == 5) { in amdgpu_atombios_dp_link_train_cr()
642 dp_info->tries = 0; in amdgpu_atombios_dp_link_train_cr()
644 voltage = dp_info->train_set[0] & DP_TRAIN_VOLTAGE_SWING_MASK; in amdgpu_atombios_dp_link_train_cr()
647 amdgpu_atombios_dp_get_adjust_train(dp_info->link_status, dp_info->dp_lane_count, in amdgpu_atombios_dp_link_train_cr()
648 dp_info->train_set); in amdgpu_atombios_dp_link_train_cr()
654 return -1; in amdgpu_atombios_dp_link_train_cr()
656 DRM_DEBUG_KMS("clock recovery at voltage %d pre-emphasis %d\n", in amdgpu_atombios_dp_link_train_cr()
657 dp_info->train_set[0] & DP_TRAIN_VOLTAGE_SWING_MASK, in amdgpu_atombios_dp_link_train_cr()
658 (dp_info->train_set[0] & DP_TRAIN_PRE_EMPHASIS_MASK) >> in amdgpu_atombios_dp_link_train_cr()
669 if (dp_info->tp3_supported) in amdgpu_atombios_dp_link_train_ce()
675 dp_info->tries = 0; in amdgpu_atombios_dp_link_train_ce()
678 drm_dp_link_train_channel_eq_delay(dp_info->dpcd); in amdgpu_atombios_dp_link_train_ce()
680 if (drm_dp_dpcd_read_link_status(dp_info->aux, in amdgpu_atombios_dp_link_train_ce()
681 dp_info->link_status) <= 0) { in amdgpu_atombios_dp_link_train_ce()
686 if (drm_dp_channel_eq_ok(dp_info->link_status, dp_info->dp_lane_count)) { in amdgpu_atombios_dp_link_train_ce()
692 if (dp_info->tries > 5) { in amdgpu_atombios_dp_link_train_ce()
698 amdgpu_atombios_dp_get_adjust_train(dp_info->link_status, dp_info->dp_lane_count, in amdgpu_atombios_dp_link_train_ce()
699 dp_info->train_set); in amdgpu_atombios_dp_link_train_ce()
702 dp_info->tries++; in amdgpu_atombios_dp_link_train_ce()
707 return -1; in amdgpu_atombios_dp_link_train_ce()
709 DRM_DEBUG_KMS("channel eq at voltage %d pre-emphasis %d\n", in amdgpu_atombios_dp_link_train_ce()
710 dp_info->train_set[0] & DP_TRAIN_VOLTAGE_SWING_MASK, in amdgpu_atombios_dp_link_train_ce()
711 (dp_info->train_set[0] & DP_TRAIN_PRE_EMPHASIS_MASK) in amdgpu_atombios_dp_link_train_ce()
720 struct drm_device *dev = encoder->dev; in amdgpu_atombios_dp_link_train()
728 if (!amdgpu_encoder->enc_priv) in amdgpu_atombios_dp_link_train()
732 if (!amdgpu_connector->con_priv) in amdgpu_atombios_dp_link_train()
734 dig_connector = amdgpu_connector->con_priv; in amdgpu_atombios_dp_link_train()
736 if ((dig_connector->dp_sink_type != CONNECTOR_OBJECT_ID_DISPLAYPORT) && in amdgpu_atombios_dp_link_train()
737 (dig_connector->dp_sink_type != CONNECTOR_OBJECT_ID_eDP)) in amdgpu_atombios_dp_link_train()
740 if (drm_dp_dpcd_readb(&amdgpu_connector->ddc_bus->aux, DP_MAX_LANE_COUNT, &tmp) in amdgpu_atombios_dp_link_train()
750 memcpy(dp_info.dpcd, dig_connector->dpcd, DP_RECEIVER_CAP_SIZE); in amdgpu_atombios_dp_link_train()
754 dp_info.dp_lane_count = dig_connector->dp_lane_count; in amdgpu_atombios_dp_link_train()
755 dp_info.dp_clock = dig_connector->dp_clock; in amdgpu_atombios_dp_link_train()
756 dp_info.aux = &amdgpu_connector->ddc_bus->aux; in amdgpu_atombios_dp_link_train()