178 	version_major = (ucode_version >> 20) & 0xfff;  in amdgpu_vce_sw_init()
179 	version_minor = (ucode_version >> 8) & 0xfff;  in amdgpu_vce_sw_init()
180 	binary_id = ucode_version & 0xff;  in amdgpu_vce_sw_init()
194 	for (i = 0; i < AMDGPU_MAX_VCE_HANDLES; ++i) {  in amdgpu_vce_sw_init()
195 		atomic_set(&adev->vce.handles[i], 0);  in amdgpu_vce_sw_init()
202 	return 0;  in amdgpu_vce_sw_init()
217 		return 0;  in amdgpu_vce_sw_fini()
225 	for (i = 0; i < adev->vce.num_rings; i++)  in amdgpu_vce_sw_fini()
231 	return 0;  in amdgpu_vce_sw_fini()
246 	ring = &adev->vce.ring[0];  in amdgpu_vce_entity_init()
250 	if (r != 0) {  in amdgpu_vce_entity_init()
255 	return 0;  in amdgpu_vce_entity_init()
271 		return 0;  in amdgpu_vce_suspend()
273 	for (i = 0; i < AMDGPU_MAX_VCE_HANDLES; ++i)  in amdgpu_vce_suspend()
278 		return 0;  in amdgpu_vce_suspend()
322 	return 0;  in amdgpu_vce_resume()
336 	unsigned i, count = 0;  in amdgpu_vce_idle_work_handler()
338 	for (i = 0; i < adev->vce.num_rings; i++)  in amdgpu_vce_idle_work_handler()
341 	if (count == 0) {  in amdgpu_vce_idle_work_handler()
345 			amdgpu_asic_set_vce_clocks(adev, 0, 0);  in amdgpu_vce_idle_work_handler()
411 	struct amdgpu_ring *ring = &adev->vce.ring[0];  in amdgpu_vce_free_handles()
413 	for (i = 0; i < AMDGPU_MAX_VCE_HANDLES; ++i) {  in amdgpu_vce_free_handles()
424 		atomic_set(&adev->vce.handles[i], 0);  in amdgpu_vce_free_handles()
454 	ib = &job->ibs[0];  in amdgpu_vce_get_create_msg()
459 	ib->length_dw = 0;  in amdgpu_vce_get_create_msg()
460 	ib->ptr[ib->length_dw++] = 0x0000000c; /* len */  in amdgpu_vce_get_create_msg()
461 	ib->ptr[ib->length_dw++] = 0x00000001; /* session cmd */  in amdgpu_vce_get_create_msg()
465 		ib->ptr[ib->length_dw++] = 0x00000040; /* len */  in amdgpu_vce_get_create_msg()
467 		ib->ptr[ib->length_dw++] = 0x00000030; /* len */  in amdgpu_vce_get_create_msg()
468 	ib->ptr[ib->length_dw++] = 0x01000001; /* create cmd */  in amdgpu_vce_get_create_msg()
469 	ib->ptr[ib->length_dw++] = 0x00000000;  in amdgpu_vce_get_create_msg()
470 	ib->ptr[ib->length_dw++] = 0x00000042;  in amdgpu_vce_get_create_msg()
471 	ib->ptr[ib->length_dw++] = 0x0000000a;  in amdgpu_vce_get_create_msg()
472 	ib->ptr[ib->length_dw++] = 0x00000001;  in amdgpu_vce_get_create_msg()
473 	ib->ptr[ib->length_dw++] = 0x00000080;  in amdgpu_vce_get_create_msg()
474 	ib->ptr[ib->length_dw++] = 0x00000060;  in amdgpu_vce_get_create_msg()
475 	ib->ptr[ib->length_dw++] = 0x00000100;  in amdgpu_vce_get_create_msg()
476 	ib->ptr[ib->length_dw++] = 0x00000100;  in amdgpu_vce_get_create_msg()
477 	ib->ptr[ib->length_dw++] = 0x0000000c;  in amdgpu_vce_get_create_msg()
478 	ib->ptr[ib->length_dw++] = 0x00000000;  in amdgpu_vce_get_create_msg()
480 		ib->ptr[ib->length_dw++] = 0x00000000;  in amdgpu_vce_get_create_msg()
481 		ib->ptr[ib->length_dw++] = 0x00000000;  in amdgpu_vce_get_create_msg()
482 		ib->ptr[ib->length_dw++] = 0x00000000;  in amdgpu_vce_get_create_msg()
483 		ib->ptr[ib->length_dw++] = 0x00000000;  in amdgpu_vce_get_create_msg()
486 	ib->ptr[ib->length_dw++] = 0x00000014; /* len */  in amdgpu_vce_get_create_msg()
487 	ib->ptr[ib->length_dw++] = 0x05000005; /* feedback buffer */  in amdgpu_vce_get_create_msg()
490 	ib->ptr[ib->length_dw++] = 0x00000001;  in amdgpu_vce_get_create_msg()
493 		ib->ptr[i] = 0x0;  in amdgpu_vce_get_create_msg()
502 	return 0;  in amdgpu_vce_get_create_msg()
534 	ib = &job->ibs[0];  in amdgpu_vce_get_destroy_msg()
537 	ib->length_dw = 0;  in amdgpu_vce_get_destroy_msg()
538 	ib->ptr[ib->length_dw++] = 0x0000000c; /* len */  in amdgpu_vce_get_destroy_msg()
539 	ib->ptr[ib->length_dw++] = 0x00000001; /* session cmd */  in amdgpu_vce_get_destroy_msg()
542 	ib->ptr[ib->length_dw++] = 0x00000020; /* len */  in amdgpu_vce_get_destroy_msg()
543 	ib->ptr[ib->length_dw++] = 0x00000002; /* task info */  in amdgpu_vce_get_destroy_msg()
544 	ib->ptr[ib->length_dw++] = 0xffffffff; /* next task info, set to 0xffffffff if no */  in amdgpu_vce_get_destroy_msg()
545 	ib->ptr[ib->length_dw++] = 0x00000001; /* destroy session */  in amdgpu_vce_get_destroy_msg()
546 	ib->ptr[ib->length_dw++] = 0x00000000;  in amdgpu_vce_get_destroy_msg()
547 	ib->ptr[ib->length_dw++] = 0x00000000;  in amdgpu_vce_get_destroy_msg()
548 …ib->ptr[ib->length_dw++] = 0xffffffff; /* feedback is not needed, set to 0xffffffff and firmware w…  in amdgpu_vce_get_destroy_msg()
549 	ib->ptr[ib->length_dw++] = 0x00000000;  in amdgpu_vce_get_destroy_msg()
551 	ib->ptr[ib->length_dw++] = 0x00000008; /* len */  in amdgpu_vce_get_destroy_msg()
552 	ib->ptr[ib->length_dw++] = 0x02000001; /* destroy cmd */  in amdgpu_vce_get_destroy_msg()
555 		ib->ptr[i] = 0x0;  in amdgpu_vce_get_destroy_msg()
568 	return 0;  in amdgpu_vce_get_destroy_msg()
599 	if (index >= 0) {  in amdgpu_vce_validate_bo()
602 		lpfn = 0x100000000ULL >> PAGE_SHIFT;  in amdgpu_vce_validate_bo()
604 		fpfn = 0;  in amdgpu_vce_validate_bo()
605 		lpfn = (0x100000000ULL - PAGE_ALIGN(offset)) >> PAGE_SHIFT;  in amdgpu_vce_validate_bo()
610 		DRM_ERROR("Can't find BO for addr 0x%010Lx %d %d %d %d\n",  in amdgpu_vce_validate_bo()
615 	for (i = 0; i < bo->placement.num_placement; ++i) {  in amdgpu_vce_validate_bo()
642 	if (index == 0xffffffff)  in amdgpu_vce_cs_reloc()
643 		index = 0;  in amdgpu_vce_cs_reloc()
651 		DRM_ERROR("Can't find BO for addr 0x%010Lx %d %d %d %d\n",  in amdgpu_vce_cs_reloc()
658 		DRM_ERROR("BO too small for addr 0x%010Lx %d %d\n",  in amdgpu_vce_cs_reloc()
670 	return 0;  in amdgpu_vce_cs_reloc()
689 	for (i = 0; i < AMDGPU_MAX_VCE_HANDLES; ++i) {  in amdgpu_vce_validate_handle()
700 	for (i = 0; i < AMDGPU_MAX_VCE_HANDLES; ++i) {  in amdgpu_vce_validate_handle()
701 		if (!atomic_cmpxchg(&p->adev->vce.handles[i], 0, handle)) {  in amdgpu_vce_validate_handle()
703 			p->adev->vce.img_size[i] = 0;  in amdgpu_vce_validate_handle()
722 	unsigned fb_idx = 0, bs_idx = 0;  in amdgpu_vce_ring_parse_cs()
724 	uint32_t destroyed = 0;  in amdgpu_vce_ring_parse_cs()
725 	uint32_t created = 0;  in amdgpu_vce_ring_parse_cs()
726 	uint32_t allocated = 0;  in amdgpu_vce_ring_parse_cs()
727 	uint32_t tmp, handle = 0;  in amdgpu_vce_ring_parse_cs()
730 	int i, r = 0;  in amdgpu_vce_ring_parse_cs()
735 	for (idx = 0; idx < ib->length_dw;) {  in amdgpu_vce_ring_parse_cs()
746 		case 0x00000002: /* task info */  in amdgpu_vce_ring_parse_cs()
751 		case 0x03000001: /* encode */  in amdgpu_vce_ring_parse_cs()
753 						   idx + 9, 0, 0);  in amdgpu_vce_ring_parse_cs()
758 						   idx + 11, 0, 0);  in amdgpu_vce_ring_parse_cs()
763 		case 0x05000001: /* context buffer */  in amdgpu_vce_ring_parse_cs()
765 						   idx + 2, 0, 0);  in amdgpu_vce_ring_parse_cs()
770 		case 0x05000004: /* video bitstream buffer */  in amdgpu_vce_ring_parse_cs()
778 		case 0x05000005: /* feedback buffer */  in amdgpu_vce_ring_parse_cs()
785 		case 0x0500000d: /* MV buffer */  in amdgpu_vce_ring_parse_cs()
787 							idx + 2, 0, 0);  in amdgpu_vce_ring_parse_cs()
792 							idx + 7, 0, 0);  in amdgpu_vce_ring_parse_cs()
801 	for (idx = 0; idx < ib->length_dw;) {  in amdgpu_vce_ring_parse_cs()
806 		case 0x00000001: /* session */  in amdgpu_vce_ring_parse_cs()
810 			if (session_idx < 0) {  in amdgpu_vce_ring_parse_cs()
817 		case 0x00000002: /* task info */  in amdgpu_vce_ring_parse_cs()
822 		case 0x01000001: /* create */  in amdgpu_vce_ring_parse_cs()
839 		case 0x04000001: /* config extension */  in amdgpu_vce_ring_parse_cs()
840 		case 0x04000002: /* pic control */  in amdgpu_vce_ring_parse_cs()
841 		case 0x04000005: /* rate control */  in amdgpu_vce_ring_parse_cs()
842 		case 0x04000007: /* motion estimation */  in amdgpu_vce_ring_parse_cs()
843 		case 0x04000008: /* rdo */  in amdgpu_vce_ring_parse_cs()
844 		case 0x04000009: /* vui */  in amdgpu_vce_ring_parse_cs()
845 		case 0x05000002: /* auxiliary buffer */  in amdgpu_vce_ring_parse_cs()
846 		case 0x05000009: /* clock table */  in amdgpu_vce_ring_parse_cs()
849 		case 0x0500000c: /* hw config */  in amdgpu_vce_ring_parse_cs()
863 		case 0x03000001: /* encode */  in amdgpu_vce_ring_parse_cs()
865 						*size, 0);  in amdgpu_vce_ring_parse_cs()
870 						*size / 3, 0);  in amdgpu_vce_ring_parse_cs()
875 		case 0x02000001: /* destroy */  in amdgpu_vce_ring_parse_cs()
879 		case 0x05000001: /* context buffer */  in amdgpu_vce_ring_parse_cs()
881 						*size * 2, 0);  in amdgpu_vce_ring_parse_cs()
886 		case 0x05000004: /* video bitstream buffer */  in amdgpu_vce_ring_parse_cs()
894 		case 0x05000005: /* feedback buffer */  in amdgpu_vce_ring_parse_cs()
901 		case 0x0500000d: /* MV buffer */  in amdgpu_vce_ring_parse_cs()
903 							idx + 2, *size, 0);  in amdgpu_vce_ring_parse_cs()
908 							idx + 7, *size / 12, 0);  in amdgpu_vce_ring_parse_cs()
914 			DRM_ERROR("invalid VCE command (0x%x)!\n", cmd);  in amdgpu_vce_ring_parse_cs()
942 	for (i = 0; i < AMDGPU_MAX_VCE_HANDLES; ++i)  in amdgpu_vce_ring_parse_cs()
944 			atomic_set(&p->adev->vce.handles[i], 0);  in amdgpu_vce_ring_parse_cs()
959 	uint32_t destroyed = 0;  in amdgpu_vce_ring_parse_cs_vm()
960 	uint32_t created = 0;  in amdgpu_vce_ring_parse_cs_vm()
961 	uint32_t allocated = 0;  in amdgpu_vce_ring_parse_cs_vm()
962 	uint32_t tmp, handle = 0;  in amdgpu_vce_ring_parse_cs_vm()
963 	int i, r = 0, idx = 0;  in amdgpu_vce_ring_parse_cs_vm()
976 		case 0x00000001: /* session */  in amdgpu_vce_ring_parse_cs_vm()
980 			if (session_idx < 0) {  in amdgpu_vce_ring_parse_cs_vm()
986 		case 0x01000001: /* create */  in amdgpu_vce_ring_parse_cs_vm()
1000 		case 0x02000001: /* destroy */  in amdgpu_vce_ring_parse_cs_vm()
1032 	for (i = 0; i < AMDGPU_MAX_VCE_HANDLES; ++i)  in amdgpu_vce_ring_parse_cs_vm()
1034 			atomic_set(&p->adev->vce.handles[i], 0);  in amdgpu_vce_ring_parse_cs_vm()
1092 		return 0;  in amdgpu_vce_ring_test_ring()
1103 	for (i = 0; i < timeout; i++) {  in amdgpu_vce_ring_test_ring()
1128 	if (ring != &ring->adev->vce.ring[0])  in amdgpu_vce_ring_test_ib()
1129 		return 0;  in amdgpu_vce_ring_test_ib()
1146 	if (r == 0)  in amdgpu_vce_ring_test_ib()
1148 	else if (r > 0)  in amdgpu_vce_ring_test_ib()
1149 		r = 0;  in amdgpu_vce_ring_test_ib()