Lines Matching defs:psp_context
217 struct psp_context struct
219 struct amdgpu_device *adev;
220 struct psp_ring km_ring;
221 struct psp_gfx_cmd_resp *cmd;
223 const struct psp_funcs *funcs;
226 struct amdgpu_bo *fw_pri_bo;
227 uint64_t fw_pri_mc_addr;
228 void *fw_pri_buf;
231 const struct firmware *sos_fw;
232 uint32_t sos_fw_version;
233 uint32_t sos_feature_version;
234 uint32_t sys_bin_size;
235 uint32_t sos_bin_size;
236 uint32_t toc_bin_size;
237 uint32_t kdb_bin_size;
238 uint32_t spl_bin_size;
239 uint8_t *sys_start_addr;
240 uint8_t *sos_start_addr;
241 uint8_t *toc_start_addr;
242 uint8_t *kdb_start_addr;
243 uint8_t *spl_start_addr;
246 struct amdgpu_bo *tmr_bo;
247 uint64_t tmr_mc_addr;
250 const struct firmware *asd_fw;
251 uint32_t asd_fw_version;
252 uint32_t asd_feature_version;
253 uint32_t asd_ucode_size;
254 uint8_t *asd_start_addr;
257 struct amdgpu_bo *fence_buf_bo;
258 uint64_t fence_buf_mc_addr;
259 void *fence_buf;
262 struct amdgpu_bo *cmd_buf_bo;
263 uint64_t cmd_buf_mc_addr;
264 struct psp_gfx_cmd_resp *cmd_buf_mem;
267 atomic_t fence_value;
269 bool autoload_supported;
271 bool pmfw_centralized_cstate_management;
274 const struct firmware *ta_fw;
275 uint32_t ta_fw_version;
276 uint32_t ta_xgmi_ucode_version;
277 uint32_t ta_xgmi_ucode_size;
278 uint8_t *ta_xgmi_start_addr;
279 uint32_t ta_ras_ucode_version;
280 uint32_t ta_ras_ucode_size;
281 uint8_t *ta_ras_start_addr;
283 uint32_t ta_hdcp_ucode_version;
284 uint32_t ta_hdcp_ucode_size;
285 uint8_t *ta_hdcp_start_addr;
287 uint32_t ta_dtm_ucode_version;
288 uint32_t ta_dtm_ucode_size;
289 uint8_t *ta_dtm_start_addr;
291 uint32_t ta_rap_ucode_version;
292 uint32_t ta_rap_ucode_size;
293 uint8_t *ta_rap_start_addr;
295 struct psp_asd_context asd_context;
296 struct psp_xgmi_context xgmi_context;
297 struct psp_ras_context ras;
298 struct psp_hdcp_context hdcp_context;
299 struct psp_dtm_context dtm_context;
300 struct psp_rap_context rap_context;
301 struct mutex mutex;
302 struct psp_memory_training_context mem_train_ctx;