Lines Matching +full:e +full:- +full:ddc

2  * Copyright 2007-8 Advanced Micro Devices, Inc.
44 struct drm_device *dev = connector->dev; in amdgpu_connector_hotplug()
48 /* bail if the connector does not have hpd pin, e.g., in amdgpu_connector_hotplug()
51 if (amdgpu_connector->hpd.hpd == AMDGPU_HPD_NONE) in amdgpu_connector_hotplug()
54 amdgpu_display_hpd_set_polarity(adev, amdgpu_connector->hpd.hpd); in amdgpu_connector_hotplug()
57 if (connector->dpms != DRM_MODE_DPMS_ON) in amdgpu_connector_hotplug()
61 if (connector->connector_type == DRM_MODE_CONNECTOR_DisplayPort) { in amdgpu_connector_hotplug()
63 amdgpu_connector->con_priv; in amdgpu_connector_hotplug()
66 if (dig_connector->dp_sink_type != CONNECTOR_OBJECT_ID_DISPLAYPORT) in amdgpu_connector_hotplug()
70 dig_connector->dp_sink_type = amdgpu_atombios_dp_get_sinktype(amdgpu_connector); in amdgpu_connector_hotplug()
71 /* don't do anything if sink is not display port, i.e., in amdgpu_connector_hotplug()
72 * passive dp->(dvi|hdmi) adaptor in amdgpu_connector_hotplug()
74 if (dig_connector->dp_sink_type == CONNECTOR_OBJECT_ID_DISPLAYPORT && in amdgpu_connector_hotplug()
75 amdgpu_display_hpd_sense(adev, amdgpu_connector->hpd.hpd) && in amdgpu_connector_hotplug()
92 struct drm_crtc *crtc = encoder->crtc; in amdgpu_connector_property_change_mode()
94 if (crtc && crtc->enabled) { in amdgpu_connector_property_change_mode()
95 drm_crtc_helper_set_mode(crtc, &crtc->mode, in amdgpu_connector_property_change_mode()
96 crtc->x, crtc->y, crtc->primary->fb); in amdgpu_connector_property_change_mode()
107 switch (connector->connector_type) { in amdgpu_connector_get_monitor_bpc()
110 if (amdgpu_connector->use_digital) { in amdgpu_connector_get_monitor_bpc()
112 if (connector->display_info.bpc) in amdgpu_connector_get_monitor_bpc()
113 bpc = connector->display_info.bpc; in amdgpu_connector_get_monitor_bpc()
120 if (connector->display_info.bpc) in amdgpu_connector_get_monitor_bpc()
121 bpc = connector->display_info.bpc; in amdgpu_connector_get_monitor_bpc()
125 dig_connector = amdgpu_connector->con_priv; in amdgpu_connector_get_monitor_bpc()
126 if ((dig_connector->dp_sink_type == CONNECTOR_OBJECT_ID_DISPLAYPORT) || in amdgpu_connector_get_monitor_bpc()
127 (dig_connector->dp_sink_type == CONNECTOR_OBJECT_ID_eDP) || in amdgpu_connector_get_monitor_bpc()
129 if (connector->display_info.bpc) in amdgpu_connector_get_monitor_bpc()
130 bpc = connector->display_info.bpc; in amdgpu_connector_get_monitor_bpc()
135 if (connector->display_info.bpc) in amdgpu_connector_get_monitor_bpc()
136 bpc = connector->display_info.bpc; in amdgpu_connector_get_monitor_bpc()
139 connector->helper_private; in amdgpu_connector_get_monitor_bpc()
140 struct drm_encoder *encoder = connector_funcs->best_encoder(connector); in amdgpu_connector_get_monitor_bpc()
142 struct amdgpu_encoder_atom_dig *dig = amdgpu_encoder->enc_priv; in amdgpu_connector_get_monitor_bpc()
144 if (dig->lcd_misc & ATOM_PANEL_MISC_V13_6BIT_PER_COLOR) in amdgpu_connector_get_monitor_bpc()
146 else if (dig->lcd_misc & ATOM_PANEL_MISC_V13_8BIT_PER_COLOR) in amdgpu_connector_get_monitor_bpc()
154 * Pre DCE-8 hw can't handle > 12 bpc, and more than 12 bpc doesn't make in amdgpu_connector_get_monitor_bpc()
157 * required by the HDMI-1.3 spec. Clamp to a safe 12 bpc maximum. in amdgpu_connector_get_monitor_bpc()
161 connector->name, bpc); in amdgpu_connector_get_monitor_bpc()
166 if (connector->display_info.max_tmds_clock > 0) { in amdgpu_connector_get_monitor_bpc()
168 mode_clock = amdgpu_connector->pixelclock_for_modeset; in amdgpu_connector_get_monitor_bpc()
171 max_tmds_clock = connector->display_info.max_tmds_clock; in amdgpu_connector_get_monitor_bpc()
174 connector->name, mode_clock, max_tmds_clock); in amdgpu_connector_get_monitor_bpc()
178 if ((connector->display_info.edid_hdmi_dc_modes & DRM_EDID_HDMI_DC_30) && in amdgpu_connector_get_monitor_bpc()
185 connector->name, bpc); in amdgpu_connector_get_monitor_bpc()
191 connector->name, bpc); in amdgpu_connector_get_monitor_bpc()
196 connector->name); in amdgpu_connector_get_monitor_bpc()
203 connector->name); in amdgpu_connector_get_monitor_bpc()
208 connector->name, connector->display_info.bpc, bpc); in amdgpu_connector_get_monitor_bpc()
219 const struct drm_connector_helper_funcs *connector_funcs = connector->helper_private; in amdgpu_connector_update_scratch_regs()
222 best_encoder = connector_funcs->best_encoder(connector); in amdgpu_connector_update_scratch_regs()
241 if (encoder->encoder_type == encoder_type) in amdgpu_connector_find_encoder()
251 struct drm_property_blob *edid_blob = connector->edid_blob_ptr; in amdgpu_connector_edid()
253 if (amdgpu_connector->edid) { in amdgpu_connector_edid()
254 return amdgpu_connector->edid; in amdgpu_connector_edid()
256 struct edid *edid = kmemdup(edid_blob->data, edid_blob->length, GFP_KERNEL); in amdgpu_connector_edid()
258 amdgpu_connector->edid = edid; in amdgpu_connector_edid()
260 return amdgpu_connector->edid; in amdgpu_connector_edid()
268 if (adev->mode_info.bios_hardcoded_edid) { in amdgpu_connector_get_hardcoded_edid()
269 edid = kmalloc(adev->mode_info.bios_hardcoded_edid_size, GFP_KERNEL); in amdgpu_connector_get_hardcoded_edid()
272 (unsigned char *)adev->mode_info.bios_hardcoded_edid, in amdgpu_connector_get_hardcoded_edid()
273 adev->mode_info.bios_hardcoded_edid_size); in amdgpu_connector_get_hardcoded_edid()
282 struct drm_device *dev = connector->dev; in amdgpu_connector_get_edid()
286 if (amdgpu_connector->edid) in amdgpu_connector_get_edid()
290 if (amdgpu_connector->router.ddc_valid) in amdgpu_connector_get_edid()
295 amdgpu_connector->ddc_bus->has_aux) { in amdgpu_connector_get_edid()
296 amdgpu_connector->edid = drm_get_edid(connector, in amdgpu_connector_get_edid()
297 &amdgpu_connector->ddc_bus->aux.ddc); in amdgpu_connector_get_edid()
298 } else if ((connector->connector_type == DRM_MODE_CONNECTOR_DisplayPort) || in amdgpu_connector_get_edid()
299 (connector->connector_type == DRM_MODE_CONNECTOR_eDP)) { in amdgpu_connector_get_edid()
300 struct amdgpu_connector_atom_dig *dig = amdgpu_connector->con_priv; in amdgpu_connector_get_edid()
302 if ((dig->dp_sink_type == CONNECTOR_OBJECT_ID_DISPLAYPORT || in amdgpu_connector_get_edid()
303 dig->dp_sink_type == CONNECTOR_OBJECT_ID_eDP) && in amdgpu_connector_get_edid()
304 amdgpu_connector->ddc_bus->has_aux) in amdgpu_connector_get_edid()
305 amdgpu_connector->edid = drm_get_edid(connector, in amdgpu_connector_get_edid()
306 &amdgpu_connector->ddc_bus->aux.ddc); in amdgpu_connector_get_edid()
307 else if (amdgpu_connector->ddc_bus) in amdgpu_connector_get_edid()
308 amdgpu_connector->edid = drm_get_edid(connector, in amdgpu_connector_get_edid()
309 &amdgpu_connector->ddc_bus->adapter); in amdgpu_connector_get_edid()
310 } else if (amdgpu_connector->ddc_bus) { in amdgpu_connector_get_edid()
311 amdgpu_connector->edid = drm_get_edid(connector, in amdgpu_connector_get_edid()
312 &amdgpu_connector->ddc_bus->adapter); in amdgpu_connector_get_edid()
315 if (!amdgpu_connector->edid) { in amdgpu_connector_get_edid()
317 if (((connector->connector_type == DRM_MODE_CONNECTOR_LVDS) || in amdgpu_connector_get_edid()
318 (connector->connector_type == DRM_MODE_CONNECTOR_eDP))) in amdgpu_connector_get_edid()
319 amdgpu_connector->edid = amdgpu_connector_get_hardcoded_edid(adev); in amdgpu_connector_get_edid()
327 kfree(amdgpu_connector->edid); in amdgpu_connector_free_edid()
328 amdgpu_connector->edid = NULL; in amdgpu_connector_free_edid()
336 if (amdgpu_connector->edid) { in amdgpu_connector_ddc_get_modes()
337 drm_connector_update_edid_property(connector, amdgpu_connector->edid); in amdgpu_connector_ddc_get_modes()
338 ret = drm_add_edid_modes(connector, amdgpu_connector->edid); in amdgpu_connector_ddc_get_modes()
367 if (!list_empty(&connector->probed_modes)) { in amdgpu_get_native_mode()
369 list_first_entry(&connector->probed_modes, in amdgpu_get_native_mode()
372 amdgpu_encoder->native_mode = *preferred_mode; in amdgpu_get_native_mode()
374 amdgpu_encoder->native_mode.clock = 0; in amdgpu_get_native_mode()
381 struct drm_device *dev = encoder->dev; in amdgpu_connector_lcd_native_mode()
384 struct drm_display_mode *native_mode = &amdgpu_encoder->native_mode; in amdgpu_connector_lcd_native_mode()
386 if (native_mode->hdisplay != 0 && in amdgpu_connector_lcd_native_mode()
387 native_mode->vdisplay != 0 && in amdgpu_connector_lcd_native_mode()
388 native_mode->clock != 0) { in amdgpu_connector_lcd_native_mode()
390 mode->type = DRM_MODE_TYPE_PREFERRED | DRM_MODE_TYPE_DRIVER; in amdgpu_connector_lcd_native_mode()
393 DRM_DEBUG_KMS("Adding native panel mode %s\n", mode->name); in amdgpu_connector_lcd_native_mode()
394 } else if (native_mode->hdisplay != 0 && in amdgpu_connector_lcd_native_mode()
395 native_mode->vdisplay != 0) { in amdgpu_connector_lcd_native_mode()
403 mode = drm_cvt_mode(dev, native_mode->hdisplay, native_mode->vdisplay, 60, true, false, false); in amdgpu_connector_lcd_native_mode()
404 mode->type = DRM_MODE_TYPE_PREFERRED | DRM_MODE_TYPE_DRIVER; in amdgpu_connector_lcd_native_mode()
405 DRM_DEBUG_KMS("Adding cvt approximation of native panel mode %s\n", mode->name); in amdgpu_connector_lcd_native_mode()
413 struct drm_device *dev = encoder->dev; in amdgpu_connector_add_common_modes()
416 struct drm_display_mode *native_mode = &amdgpu_encoder->native_mode; in amdgpu_connector_add_common_modes()
442 if (amdgpu_encoder->devices & (ATOM_DEVICE_TV_SUPPORT)) { in amdgpu_connector_add_common_modes()
447 if (amdgpu_encoder->devices & (ATOM_DEVICE_LCD_SUPPORT)) { in amdgpu_connector_add_common_modes()
448 if (common_modes[i].w > native_mode->hdisplay || in amdgpu_connector_add_common_modes()
449 common_modes[i].h > native_mode->vdisplay || in amdgpu_connector_add_common_modes()
450 (common_modes[i].w == native_mode->hdisplay && in amdgpu_connector_add_common_modes()
451 common_modes[i].h == native_mode->vdisplay)) in amdgpu_connector_add_common_modes()
466 struct drm_device *dev = connector->dev; in amdgpu_connector_set_property()
471 if (property == adev->mode_info.coherent_mode_property) { in amdgpu_connector_set_property()
482 if (!amdgpu_encoder->enc_priv) in amdgpu_connector_set_property()
485 dig = amdgpu_encoder->enc_priv; in amdgpu_connector_set_property()
487 if (dig->coherent_mode != new_coherent_mode) { in amdgpu_connector_set_property()
488 dig->coherent_mode = new_coherent_mode; in amdgpu_connector_set_property()
489 amdgpu_connector_property_change_mode(&amdgpu_encoder->base); in amdgpu_connector_set_property()
493 if (property == adev->mode_info.audio_property) { in amdgpu_connector_set_property()
502 if (amdgpu_connector->audio != val) { in amdgpu_connector_set_property()
503 amdgpu_connector->audio = val; in amdgpu_connector_set_property()
504 amdgpu_connector_property_change_mode(&amdgpu_encoder->base); in amdgpu_connector_set_property()
508 if (property == adev->mode_info.dither_property) { in amdgpu_connector_set_property()
517 if (amdgpu_connector->dither != val) { in amdgpu_connector_set_property()
518 amdgpu_connector->dither = val; in amdgpu_connector_set_property()
519 amdgpu_connector_property_change_mode(&amdgpu_encoder->base); in amdgpu_connector_set_property()
523 if (property == adev->mode_info.underscan_property) { in amdgpu_connector_set_property()
531 if (amdgpu_encoder->underscan_type != val) { in amdgpu_connector_set_property()
532 amdgpu_encoder->underscan_type = val; in amdgpu_connector_set_property()
533 amdgpu_connector_property_change_mode(&amdgpu_encoder->base); in amdgpu_connector_set_property()
537 if (property == adev->mode_info.underscan_hborder_property) { in amdgpu_connector_set_property()
545 if (amdgpu_encoder->underscan_hborder != val) { in amdgpu_connector_set_property()
546 amdgpu_encoder->underscan_hborder = val; in amdgpu_connector_set_property()
547 amdgpu_connector_property_change_mode(&amdgpu_encoder->base); in amdgpu_connector_set_property()
551 if (property == adev->mode_info.underscan_vborder_property) { in amdgpu_connector_set_property()
559 if (amdgpu_encoder->underscan_vborder != val) { in amdgpu_connector_set_property()
560 amdgpu_encoder->underscan_vborder = val; in amdgpu_connector_set_property()
561 amdgpu_connector_property_change_mode(&amdgpu_encoder->base); in amdgpu_connector_set_property()
565 if (property == adev->mode_info.load_detect_property) { in amdgpu_connector_set_property()
570 amdgpu_connector->dac_load_detect = false; in amdgpu_connector_set_property()
572 amdgpu_connector->dac_load_detect = true; in amdgpu_connector_set_property()
575 if (property == dev->mode_config.scaling_mode_property) { in amdgpu_connector_set_property()
578 if (connector->encoder) { in amdgpu_connector_set_property()
579 amdgpu_encoder = to_amdgpu_encoder(connector->encoder); in amdgpu_connector_set_property()
581 const struct drm_connector_helper_funcs *connector_funcs = connector->helper_private; in amdgpu_connector_set_property()
582 amdgpu_encoder = to_amdgpu_encoder(connector_funcs->best_encoder(connector)); in amdgpu_connector_set_property()
592 if (amdgpu_encoder->rmx_type == rmx_type) in amdgpu_connector_set_property()
596 (amdgpu_encoder->native_mode.clock == 0)) in amdgpu_connector_set_property()
599 amdgpu_encoder->rmx_type = rmx_type; in amdgpu_connector_set_property()
601 amdgpu_connector_property_change_mode(&amdgpu_encoder->base); in amdgpu_connector_set_property()
612 struct drm_display_mode *native_mode = &amdgpu_encoder->native_mode; in amdgpu_connector_fixup_lcd_native_mode()
616 list_for_each_entry_safe(mode, t, &connector->probed_modes, head) { in amdgpu_connector_fixup_lcd_native_mode()
617 if (mode->type & DRM_MODE_TYPE_PREFERRED) { in amdgpu_connector_fixup_lcd_native_mode()
618 if (mode->hdisplay != native_mode->hdisplay || in amdgpu_connector_fixup_lcd_native_mode()
619 mode->vdisplay != native_mode->vdisplay) in amdgpu_connector_fixup_lcd_native_mode()
625 if (!native_mode->clock) { in amdgpu_connector_fixup_lcd_native_mode()
626 list_for_each_entry_safe(mode, t, &connector->probed_modes, head) { in amdgpu_connector_fixup_lcd_native_mode()
627 if (mode->hdisplay == native_mode->hdisplay && in amdgpu_connector_fixup_lcd_native_mode()
628 mode->vdisplay == native_mode->vdisplay) { in amdgpu_connector_fixup_lcd_native_mode()
637 if (!native_mode->clock) { in amdgpu_connector_fixup_lcd_native_mode()
639 amdgpu_encoder->rmx_type = RMX_OFF; in amdgpu_connector_fixup_lcd_native_mode()
671 connector->display_info.width_mm = mode->width_mm; in amdgpu_connector_lvds_get_modes()
672 connector->display_info.height_mm = mode->height_mm; in amdgpu_connector_lvds_get_modes()
685 if ((mode->hdisplay < 320) || (mode->vdisplay < 240)) in amdgpu_connector_lvds_mode_valid()
690 struct drm_display_mode *native_mode = &amdgpu_encoder->native_mode; in amdgpu_connector_lvds_mode_valid()
695 if ((mode->hdisplay > native_mode->hdisplay) || in amdgpu_connector_lvds_mode_valid()
696 (mode->vdisplay > native_mode->vdisplay)) in amdgpu_connector_lvds_mode_valid()
699 /* if scaling is disabled, block non-native modes */ in amdgpu_connector_lvds_mode_valid()
700 if (amdgpu_encoder->rmx_type == RMX_OFF) { in amdgpu_connector_lvds_mode_valid()
701 if ((mode->hdisplay != native_mode->hdisplay) || in amdgpu_connector_lvds_mode_valid()
702 (mode->vdisplay != native_mode->vdisplay)) in amdgpu_connector_lvds_mode_valid()
719 r = pm_runtime_get_sync(connector->dev->dev); in amdgpu_connector_lvds_detect()
721 pm_runtime_put_autosuspend(connector->dev->dev); in amdgpu_connector_lvds_detect()
728 struct drm_display_mode *native_mode = &amdgpu_encoder->native_mode; in amdgpu_connector_lvds_detect()
731 if (native_mode->hdisplay >= 320 && native_mode->vdisplay >= 240) in amdgpu_connector_lvds_detect()
738 if (amdgpu_connector->edid) in amdgpu_connector_lvds_detect()
745 pm_runtime_mark_last_busy(connector->dev->dev); in amdgpu_connector_lvds_detect()
746 pm_runtime_put_autosuspend(connector->dev->dev); in amdgpu_connector_lvds_detect()
756 if (amdgpu_connector->ddc_bus && amdgpu_connector->ddc_bus->has_aux) { in amdgpu_connector_unregister()
757 drm_dp_aux_unregister(&amdgpu_connector->ddc_bus->aux); in amdgpu_connector_unregister()
758 amdgpu_connector->ddc_bus->has_aux = false; in amdgpu_connector_unregister()
767 kfree(amdgpu_connector->con_priv); in amdgpu_connector_destroy()
777 struct drm_device *dev = connector->dev; in amdgpu_connector_set_lcd_property()
782 if (property != dev->mode_config.scaling_mode_property) in amdgpu_connector_set_lcd_property()
785 if (connector->encoder) in amdgpu_connector_set_lcd_property()
786 amdgpu_encoder = to_amdgpu_encoder(connector->encoder); in amdgpu_connector_set_lcd_property()
788 const struct drm_connector_helper_funcs *connector_funcs = connector->helper_private; in amdgpu_connector_set_lcd_property()
789 amdgpu_encoder = to_amdgpu_encoder(connector_funcs->best_encoder(connector)); in amdgpu_connector_set_lcd_property()
799 if (amdgpu_encoder->rmx_type == rmx_type) in amdgpu_connector_set_lcd_property()
802 amdgpu_encoder->rmx_type = rmx_type; in amdgpu_connector_set_lcd_property()
804 amdgpu_connector_property_change_mode(&amdgpu_encoder->base); in amdgpu_connector_set_lcd_property()
837 struct drm_device *dev = connector->dev; in amdgpu_connector_vga_mode_valid()
842 if ((mode->clock / 10) > adev->clock.max_pixel_clock) in amdgpu_connector_vga_mode_valid()
859 r = pm_runtime_get_sync(connector->dev->dev); in amdgpu_connector_vga_detect()
861 pm_runtime_put_autosuspend(connector->dev->dev); in amdgpu_connector_vga_detect()
870 if (amdgpu_connector->ddc_bus) in amdgpu_connector_vga_detect()
873 amdgpu_connector->detected_by_load = false; in amdgpu_connector_vga_detect()
877 if (!amdgpu_connector->edid) { in amdgpu_connector_vga_detect()
879 connector->name); in amdgpu_connector_vga_detect()
882 amdgpu_connector->use_digital = in amdgpu_connector_vga_detect()
883 !!(amdgpu_connector->edid->input & DRM_EDID_INPUT_DIGITAL); in amdgpu_connector_vga_detect()
886 * with a shared ddc line (often vga + hdmi) in amdgpu_connector_vga_detect()
888 if (amdgpu_connector->use_digital && amdgpu_connector->shared_ddc) { in amdgpu_connector_vga_detect()
902 if (amdgpu_connector->detected_by_load) in amdgpu_connector_vga_detect()
903 ret = connector->status; in amdgpu_connector_vga_detect()
907 if (amdgpu_connector->dac_load_detect && encoder) { in amdgpu_connector_vga_detect()
908 encoder_funcs = encoder->helper_private; in amdgpu_connector_vga_detect()
909 ret = encoder_funcs->detect(encoder, connector); in amdgpu_connector_vga_detect()
911 amdgpu_connector->detected_by_load = true; in amdgpu_connector_vga_detect()
919 pm_runtime_mark_last_busy(connector->dev->dev); in amdgpu_connector_vga_detect()
920 pm_runtime_put_autosuspend(connector->dev->dev); in amdgpu_connector_vga_detect()
944 struct drm_device *dev = connector->dev; in amdgpu_connector_check_hpd_status_unchanged()
949 if (amdgpu_connector->hpd.hpd != AMDGPU_HPD_NONE) { in amdgpu_connector_check_hpd_status_unchanged()
950 if (amdgpu_display_hpd_sense(adev, amdgpu_connector->hpd.hpd)) in amdgpu_connector_check_hpd_status_unchanged()
954 if (connector->status == status) in amdgpu_connector_check_hpd_status_unchanged()
963 * Do a DDC probe, if DDC probe passes, get the full EDID so
965 * If the monitor is an analog monitor or we got no DDC,
967 * If we got no DDC, we do load detection on the DAC encoder object.
968 * If we got analog DDC or load detection passes on the DAC encoder
975 struct drm_device *dev = connector->dev; in amdgpu_connector_dvi_detect()
984 r = pm_runtime_get_sync(connector->dev->dev); in amdgpu_connector_dvi_detect()
986 pm_runtime_put_autosuspend(connector->dev->dev); in amdgpu_connector_dvi_detect()
992 ret = connector->status; in amdgpu_connector_dvi_detect()
996 if (amdgpu_connector->ddc_bus) in amdgpu_connector_dvi_detect()
999 amdgpu_connector->detected_by_load = false; in amdgpu_connector_dvi_detect()
1003 if (!amdgpu_connector->edid) { in amdgpu_connector_dvi_detect()
1005 connector->name); in amdgpu_connector_dvi_detect()
1009 amdgpu_connector->use_digital = in amdgpu_connector_dvi_detect()
1010 !!(amdgpu_connector->edid->input & DRM_EDID_INPUT_DIGITAL); in amdgpu_connector_dvi_detect()
1013 * with a shared ddc line (often vga + hdmi) in amdgpu_connector_dvi_detect()
1015 if ((!amdgpu_connector->use_digital) && amdgpu_connector->shared_ddc) { in amdgpu_connector_dvi_detect()
1023 * shared DDC line and we have boards with DVI-D + HDMI with a shared in amdgpu_connector_dvi_detect()
1024 * DDC line. The latter is more complex because with DVI<->HDMI adapters in amdgpu_connector_dvi_detect()
1027 if (amdgpu_connector->shared_ddc && (ret == connector_status_connected)) { in amdgpu_connector_dvi_detect()
1038 if (list_amdgpu_connector->shared_ddc && in amdgpu_connector_dvi_detect()
1039 (list_amdgpu_connector->ddc_bus->rec.i2c_id == in amdgpu_connector_dvi_detect()
1040 amdgpu_connector->ddc_bus->rec.i2c_id)) { in amdgpu_connector_dvi_detect()
1042 if (list_connector->connector_type != DRM_MODE_CONNECTOR_VGA) { in amdgpu_connector_dvi_detect()
1044 if (!amdgpu_display_hpd_sense(adev, amdgpu_connector->hpd.hpd)) { in amdgpu_connector_dvi_detect()
1056 if ((ret == connector_status_connected) && (amdgpu_connector->use_digital == true)) in amdgpu_connector_dvi_detect()
1059 /* DVI-D and HDMI-A are digital only */ in amdgpu_connector_dvi_detect()
1060 if ((connector->connector_type == DRM_MODE_CONNECTOR_DVID) || in amdgpu_connector_dvi_detect()
1061 (connector->connector_type == DRM_MODE_CONNECTOR_HDMIA)) in amdgpu_connector_dvi_detect()
1069 if (amdgpu_connector->detected_by_load) in amdgpu_connector_dvi_detect()
1070 ret = connector->status; in amdgpu_connector_dvi_detect()
1075 if (amdgpu_connector->dac_load_detect) { in amdgpu_connector_dvi_detect()
1079 if (encoder->encoder_type != DRM_MODE_ENCODER_DAC && in amdgpu_connector_dvi_detect()
1080 encoder->encoder_type != DRM_MODE_ENCODER_TVDAC) in amdgpu_connector_dvi_detect()
1083 encoder_funcs = encoder->helper_private; in amdgpu_connector_dvi_detect()
1084 if (encoder_funcs->detect) { in amdgpu_connector_dvi_detect()
1087 /* deal with analog monitors without DDC */ in amdgpu_connector_dvi_detect()
1088 ret = encoder_funcs->detect(encoder, connector); in amdgpu_connector_dvi_detect()
1090 amdgpu_connector->use_digital = false; in amdgpu_connector_dvi_detect()
1093 amdgpu_connector->detected_by_load = true; in amdgpu_connector_dvi_detect()
1098 amdgpu_connector->use_digital = true; in amdgpu_connector_dvi_detect()
1099 lret = encoder_funcs->detect(encoder, connector); in amdgpu_connector_dvi_detect()
1100 DRM_DEBUG_KMS("load_detect %x returned: %x\n",encoder->encoder_type,lret); in amdgpu_connector_dvi_detect()
1102 amdgpu_connector->use_digital = false; in amdgpu_connector_dvi_detect()
1115 pm_runtime_mark_last_busy(connector->dev->dev); in amdgpu_connector_dvi_detect()
1116 pm_runtime_put_autosuspend(connector->dev->dev); in amdgpu_connector_dvi_detect()
1130 if (amdgpu_connector->use_digital == true) { in amdgpu_connector_dvi_encoder()
1131 if (encoder->encoder_type == DRM_MODE_ENCODER_TMDS) in amdgpu_connector_dvi_encoder()
1134 if (encoder->encoder_type == DRM_MODE_ENCODER_DAC || in amdgpu_connector_dvi_encoder()
1135 encoder->encoder_type == DRM_MODE_ENCODER_TVDAC) in amdgpu_connector_dvi_encoder()
1153 if (connector->force == DRM_FORCE_ON) in amdgpu_connector_dvi_force()
1154 amdgpu_connector->use_digital = false; in amdgpu_connector_dvi_force()
1155 if (connector->force == DRM_FORCE_ON_DIGITAL) in amdgpu_connector_dvi_force()
1156 amdgpu_connector->use_digital = true; in amdgpu_connector_dvi_force()
1162 struct drm_device *dev = connector->dev; in amdgpu_connector_dvi_mode_valid()
1168 if (amdgpu_connector->use_digital && (mode->clock > 165000)) { in amdgpu_connector_dvi_mode_valid()
1169 if ((amdgpu_connector->connector_object_id == CONNECTOR_OBJECT_ID_DUAL_LINK_DVI_I) || in amdgpu_connector_dvi_mode_valid()
1170 (amdgpu_connector->connector_object_id == CONNECTOR_OBJECT_ID_DUAL_LINK_DVI_D) || in amdgpu_connector_dvi_mode_valid()
1171 (amdgpu_connector->connector_object_id == CONNECTOR_OBJECT_ID_HDMI_TYPE_B)) { in amdgpu_connector_dvi_mode_valid()
1175 if (mode->clock > 340000) in amdgpu_connector_dvi_mode_valid()
1185 if ((mode->clock / 10) > adev->clock.max_pixel_clock) in amdgpu_connector_dvi_mode_valid()
1210 struct amdgpu_connector_atom_dig *amdgpu_dig_connector = amdgpu_connector->con_priv; in amdgpu_connector_dp_get_modes()
1214 if ((connector->connector_type == DRM_MODE_CONNECTOR_eDP) || in amdgpu_connector_dp_get_modes()
1215 (connector->connector_type == DRM_MODE_CONNECTOR_LVDS)) { in amdgpu_connector_dp_get_modes()
1218 if (connector->connector_type == DRM_MODE_CONNECTOR_eDP) { in amdgpu_connector_dp_get_modes()
1219 if (!amdgpu_dig_connector->edp_on) in amdgpu_connector_dp_get_modes()
1224 if (!amdgpu_dig_connector->edp_on) in amdgpu_connector_dp_get_modes()
1228 /* need to setup ddc on the bridge */ in amdgpu_connector_dp_get_modes()
1256 connector->display_info.width_mm = mode->width_mm; in amdgpu_connector_dp_get_modes()
1257 connector->display_info.height_mm = mode->height_mm; in amdgpu_connector_dp_get_modes()
1262 /* need to setup ddc on the bridge */ in amdgpu_connector_dp_get_modes()
1285 switch (amdgpu_encoder->encoder_id) { in amdgpu_connector_encoder_get_dp_bridge_encoder_id()
1288 return amdgpu_encoder->encoder_id; in amdgpu_connector_encoder_get_dp_bridge_encoder_id()
1305 if (amdgpu_encoder->caps & ATOM_ENCODER_CAP_RECORD_HBR2) in amdgpu_connector_encoder_is_hbr2()
1314 struct drm_device *dev = connector->dev; in amdgpu_connector_is_dp12_capable()
1317 if ((adev->clock.default_dispclk >= 53900) && in amdgpu_connector_is_dp12_capable()
1328 struct drm_device *dev = connector->dev; in amdgpu_connector_dp_detect()
1332 struct amdgpu_connector_atom_dig *amdgpu_dig_connector = amdgpu_connector->con_priv; in amdgpu_connector_dp_detect()
1337 r = pm_runtime_get_sync(connector->dev->dev); in amdgpu_connector_dp_detect()
1339 pm_runtime_put_autosuspend(connector->dev->dev); in amdgpu_connector_dp_detect()
1345 ret = connector->status; in amdgpu_connector_dp_detect()
1351 if ((connector->connector_type == DRM_MODE_CONNECTOR_eDP) || in amdgpu_connector_dp_detect()
1352 (connector->connector_type == DRM_MODE_CONNECTOR_LVDS)) { in amdgpu_connector_dp_detect()
1355 struct drm_display_mode *native_mode = &amdgpu_encoder->native_mode; in amdgpu_connector_dp_detect()
1358 if (native_mode->hdisplay >= 320 && native_mode->vdisplay >= 240) in amdgpu_connector_dp_detect()
1362 amdgpu_dig_connector->dp_sink_type = CONNECTOR_OBJECT_ID_DISPLAYPORT; in amdgpu_connector_dp_detect()
1363 if (!amdgpu_dig_connector->edp_on) in amdgpu_connector_dp_detect()
1368 if (!amdgpu_dig_connector->edp_on) in amdgpu_connector_dp_detect()
1374 amdgpu_dig_connector->dp_sink_type = CONNECTOR_OBJECT_ID_DISPLAYPORT; in amdgpu_connector_dp_detect()
1379 /* setup ddc on the bridge */ in amdgpu_connector_dp_detect()
1382 /* try DDC */ in amdgpu_connector_dp_detect()
1385 else if (amdgpu_connector->dac_load_detect) { /* try load detection */ in amdgpu_connector_dp_detect()
1386 const struct drm_encoder_helper_funcs *encoder_funcs = encoder->helper_private; in amdgpu_connector_dp_detect()
1387 ret = encoder_funcs->detect(encoder, connector); in amdgpu_connector_dp_detect()
1391 amdgpu_dig_connector->dp_sink_type = in amdgpu_connector_dp_detect()
1393 if (amdgpu_display_hpd_sense(adev, amdgpu_connector->hpd.hpd)) { in amdgpu_connector_dp_detect()
1395 if (amdgpu_dig_connector->dp_sink_type == CONNECTOR_OBJECT_ID_DISPLAYPORT) in amdgpu_connector_dp_detect()
1398 if (amdgpu_dig_connector->dp_sink_type == CONNECTOR_OBJECT_ID_DISPLAYPORT) { in amdgpu_connector_dp_detect()
1402 /* try non-aux ddc (DP to DVI/HDMI/etc. adapter) */ in amdgpu_connector_dp_detect()
1413 pm_runtime_mark_last_busy(connector->dev->dev); in amdgpu_connector_dp_detect()
1414 pm_runtime_put_autosuspend(connector->dev->dev); in amdgpu_connector_dp_detect()
1417 drm_dp_set_subconnector_property(&amdgpu_connector->base, in amdgpu_connector_dp_detect()
1419 amdgpu_dig_connector->dpcd, in amdgpu_connector_dp_detect()
1420 amdgpu_dig_connector->downstream_ports); in amdgpu_connector_dp_detect()
1428 struct amdgpu_connector_atom_dig *amdgpu_dig_connector = amdgpu_connector->con_priv; in amdgpu_connector_dp_mode_valid()
1432 if ((connector->connector_type == DRM_MODE_CONNECTOR_eDP) || in amdgpu_connector_dp_mode_valid()
1433 (connector->connector_type == DRM_MODE_CONNECTOR_LVDS)) { in amdgpu_connector_dp_mode_valid()
1436 if ((mode->hdisplay < 320) || (mode->vdisplay < 240)) in amdgpu_connector_dp_mode_valid()
1441 struct drm_display_mode *native_mode = &amdgpu_encoder->native_mode; in amdgpu_connector_dp_mode_valid()
1446 if ((mode->hdisplay > native_mode->hdisplay) || in amdgpu_connector_dp_mode_valid()
1447 (mode->vdisplay > native_mode->vdisplay)) in amdgpu_connector_dp_mode_valid()
1450 /* if scaling is disabled, block non-native modes */ in amdgpu_connector_dp_mode_valid()
1451 if (amdgpu_encoder->rmx_type == RMX_OFF) { in amdgpu_connector_dp_mode_valid()
1452 if ((mode->hdisplay != native_mode->hdisplay) || in amdgpu_connector_dp_mode_valid()
1453 (mode->vdisplay != native_mode->vdisplay)) in amdgpu_connector_dp_mode_valid()
1459 if ((amdgpu_dig_connector->dp_sink_type == CONNECTOR_OBJECT_ID_DISPLAYPORT) || in amdgpu_connector_dp_mode_valid()
1460 (amdgpu_dig_connector->dp_sink_type == CONNECTOR_OBJECT_ID_eDP)) { in amdgpu_connector_dp_mode_valid()
1465 if (mode->clock > 340000) in amdgpu_connector_dp_mode_valid()
1468 if (mode->clock > 165000) in amdgpu_connector_dp_mode_valid()
1483 if (amdgpu_connector->ddc_bus->has_aux) { in amdgpu_connector_late_register()
1484 amdgpu_connector->ddc_bus->aux.dev = amdgpu_connector->base.kdev; in amdgpu_connector_late_register()
1485 r = drm_dp_aux_register(&amdgpu_connector->ddc_bus->aux); in amdgpu_connector_late_register()
1536 struct i2c_adapter *ddc = NULL; in amdgpu_connector_add() local
1549 if (amdgpu_connector->connector_id == connector_id) { in amdgpu_connector_add()
1550 amdgpu_connector->devices |= supported_device; in amdgpu_connector_add()
1554 if (amdgpu_connector->ddc_bus && i2c_bus->valid) { in amdgpu_connector_add()
1555 if (amdgpu_connector->ddc_bus->rec.i2c_id == i2c_bus->i2c_id) { in amdgpu_connector_add()
1556 amdgpu_connector->shared_ddc = true; in amdgpu_connector_add()
1559 if (amdgpu_connector->router_bus && router->ddc_valid && in amdgpu_connector_add()
1560 (amdgpu_connector->router.router_id == router->router_id)) { in amdgpu_connector_add()
1561 amdgpu_connector->shared_ddc = false; in amdgpu_connector_add()
1569 list_for_each_entry(encoder, &dev->mode_config.encoder_list, head) { in amdgpu_connector_add()
1571 if (amdgpu_encoder->devices & supported_device) { in amdgpu_connector_add()
1572 switch (amdgpu_encoder->encoder_id) { in amdgpu_connector_add()
1587 connector = &amdgpu_connector->base; in amdgpu_connector_add()
1589 amdgpu_connector->connector_id = connector_id; in amdgpu_connector_add()
1590 amdgpu_connector->devices = supported_device; in amdgpu_connector_add()
1591 amdgpu_connector->shared_ddc = shared_ddc; in amdgpu_connector_add()
1592 amdgpu_connector->connector_object_id = connector_object_id; in amdgpu_connector_add()
1593 amdgpu_connector->hpd = *hpd; in amdgpu_connector_add()
1595 amdgpu_connector->router = *router; in amdgpu_connector_add()
1596 if (router->ddc_valid || router->cd_valid) { in amdgpu_connector_add()
1597 amdgpu_connector->router_bus = amdgpu_i2c_lookup(adev, &router->i2c_info); in amdgpu_connector_add()
1598 if (!amdgpu_connector->router_bus) in amdgpu_connector_add()
1606 amdgpu_connector->con_priv = amdgpu_dig_connector; in amdgpu_connector_add()
1607 if (i2c_bus->valid) { in amdgpu_connector_add()
1608 amdgpu_connector->ddc_bus = amdgpu_i2c_lookup(adev, i2c_bus); in amdgpu_connector_add()
1609 if (amdgpu_connector->ddc_bus) { in amdgpu_connector_add()
1611 ddc = &amdgpu_connector->ddc_bus->adapter; in amdgpu_connector_add()
1613 DRM_ERROR("DP: Failed to assign ddc bus! Check dmesg for i2c errors.\n"); in amdgpu_connector_add()
1620 drm_connector_init_with_ddc(dev, &amdgpu_connector->base, in amdgpu_connector_add()
1623 ddc); in amdgpu_connector_add()
1624 drm_connector_helper_add(&amdgpu_connector->base, in amdgpu_connector_add()
1626 connector->interlace_allowed = true; in amdgpu_connector_add()
1627 connector->doublescan_allowed = true; in amdgpu_connector_add()
1628 amdgpu_connector->dac_load_detect = true; in amdgpu_connector_add()
1629 drm_object_attach_property(&amdgpu_connector->base.base, in amdgpu_connector_add()
1630 adev->mode_info.load_detect_property, in amdgpu_connector_add()
1632 drm_object_attach_property(&amdgpu_connector->base.base, in amdgpu_connector_add()
1633 dev->mode_config.scaling_mode_property, in amdgpu_connector_add()
1641 drm_connector_init_with_ddc(dev, &amdgpu_connector->base, in amdgpu_connector_add()
1644 ddc); in amdgpu_connector_add()
1645 drm_connector_helper_add(&amdgpu_connector->base, in amdgpu_connector_add()
1647 drm_object_attach_property(&amdgpu_connector->base.base, in amdgpu_connector_add()
1648 adev->mode_info.underscan_property, in amdgpu_connector_add()
1650 drm_object_attach_property(&amdgpu_connector->base.base, in amdgpu_connector_add()
1651 adev->mode_info.underscan_hborder_property, in amdgpu_connector_add()
1653 drm_object_attach_property(&amdgpu_connector->base.base, in amdgpu_connector_add()
1654 adev->mode_info.underscan_vborder_property, in amdgpu_connector_add()
1657 drm_object_attach_property(&amdgpu_connector->base.base, in amdgpu_connector_add()
1658 dev->mode_config.scaling_mode_property, in amdgpu_connector_add()
1661 drm_object_attach_property(&amdgpu_connector->base.base, in amdgpu_connector_add()
1662 adev->mode_info.dither_property, in amdgpu_connector_add()
1666 drm_object_attach_property(&amdgpu_connector->base.base, in amdgpu_connector_add()
1667 adev->mode_info.audio_property, in amdgpu_connector_add()
1671 connector->interlace_allowed = true; in amdgpu_connector_add()
1673 connector->doublescan_allowed = true; in amdgpu_connector_add()
1675 connector->doublescan_allowed = false; in amdgpu_connector_add()
1677 amdgpu_connector->dac_load_detect = true; in amdgpu_connector_add()
1678 drm_object_attach_property(&amdgpu_connector->base.base, in amdgpu_connector_add()
1679 adev->mode_info.load_detect_property, in amdgpu_connector_add()
1685 drm_connector_init_with_ddc(dev, &amdgpu_connector->base, in amdgpu_connector_add()
1688 ddc); in amdgpu_connector_add()
1689 drm_connector_helper_add(&amdgpu_connector->base, in amdgpu_connector_add()
1691 drm_object_attach_property(&amdgpu_connector->base.base, in amdgpu_connector_add()
1692 dev->mode_config.scaling_mode_property, in amdgpu_connector_add()
1695 connector->interlace_allowed = false; in amdgpu_connector_add()
1696 connector->doublescan_allowed = false; in amdgpu_connector_add()
1702 if (i2c_bus->valid) { in amdgpu_connector_add()
1703 amdgpu_connector->ddc_bus = amdgpu_i2c_lookup(adev, i2c_bus); in amdgpu_connector_add()
1704 if (!amdgpu_connector->ddc_bus) in amdgpu_connector_add()
1705 DRM_ERROR("VGA: Failed to assign ddc bus! Check dmesg for i2c errors.\n"); in amdgpu_connector_add()
1707 ddc = &amdgpu_connector->ddc_bus->adapter; in amdgpu_connector_add()
1709 drm_connector_init_with_ddc(dev, &amdgpu_connector->base, in amdgpu_connector_add()
1712 ddc); in amdgpu_connector_add()
1713 drm_connector_helper_add(&amdgpu_connector->base, &amdgpu_connector_vga_helper_funcs); in amdgpu_connector_add()
1714 amdgpu_connector->dac_load_detect = true; in amdgpu_connector_add()
1715 drm_object_attach_property(&amdgpu_connector->base.base, in amdgpu_connector_add()
1716 adev->mode_info.load_detect_property, in amdgpu_connector_add()
1718 drm_object_attach_property(&amdgpu_connector->base.base, in amdgpu_connector_add()
1719 dev->mode_config.scaling_mode_property, in amdgpu_connector_add()
1722 amdgpu_connector->hpd.hpd = AMDGPU_HPD_NONE; in amdgpu_connector_add()
1723 connector->interlace_allowed = true; in amdgpu_connector_add()
1724 connector->doublescan_allowed = true; in amdgpu_connector_add()
1727 if (i2c_bus->valid) { in amdgpu_connector_add()
1728 amdgpu_connector->ddc_bus = amdgpu_i2c_lookup(adev, i2c_bus); in amdgpu_connector_add()
1729 if (!amdgpu_connector->ddc_bus) in amdgpu_connector_add()
1730 DRM_ERROR("DVIA: Failed to assign ddc bus! Check dmesg for i2c errors.\n"); in amdgpu_connector_add()
1732 ddc = &amdgpu_connector->ddc_bus->adapter; in amdgpu_connector_add()
1734 drm_connector_init_with_ddc(dev, &amdgpu_connector->base, in amdgpu_connector_add()
1737 ddc); in amdgpu_connector_add()
1738 drm_connector_helper_add(&amdgpu_connector->base, &amdgpu_connector_vga_helper_funcs); in amdgpu_connector_add()
1739 amdgpu_connector->dac_load_detect = true; in amdgpu_connector_add()
1740 drm_object_attach_property(&amdgpu_connector->base.base, in amdgpu_connector_add()
1741 adev->mode_info.load_detect_property, in amdgpu_connector_add()
1743 drm_object_attach_property(&amdgpu_connector->base.base, in amdgpu_connector_add()
1744 dev->mode_config.scaling_mode_property, in amdgpu_connector_add()
1747 amdgpu_connector->hpd.hpd = AMDGPU_HPD_NONE; in amdgpu_connector_add()
1748 connector->interlace_allowed = true; in amdgpu_connector_add()
1749 connector->doublescan_allowed = true; in amdgpu_connector_add()
1756 amdgpu_connector->con_priv = amdgpu_dig_connector; in amdgpu_connector_add()
1757 if (i2c_bus->valid) { in amdgpu_connector_add()
1758 amdgpu_connector->ddc_bus = amdgpu_i2c_lookup(adev, i2c_bus); in amdgpu_connector_add()
1759 if (!amdgpu_connector->ddc_bus) in amdgpu_connector_add()
1760 DRM_ERROR("DVI: Failed to assign ddc bus! Check dmesg for i2c errors.\n"); in amdgpu_connector_add()
1762 ddc = &amdgpu_connector->ddc_bus->adapter; in amdgpu_connector_add()
1764 drm_connector_init_with_ddc(dev, &amdgpu_connector->base, in amdgpu_connector_add()
1767 ddc); in amdgpu_connector_add()
1768 drm_connector_helper_add(&amdgpu_connector->base, &amdgpu_connector_dvi_helper_funcs); in amdgpu_connector_add()
1770 drm_object_attach_property(&amdgpu_connector->base.base, in amdgpu_connector_add()
1771 adev->mode_info.coherent_mode_property, in amdgpu_connector_add()
1773 drm_object_attach_property(&amdgpu_connector->base.base, in amdgpu_connector_add()
1774 adev->mode_info.underscan_property, in amdgpu_connector_add()
1776 drm_object_attach_property(&amdgpu_connector->base.base, in amdgpu_connector_add()
1777 adev->mode_info.underscan_hborder_property, in amdgpu_connector_add()
1779 drm_object_attach_property(&amdgpu_connector->base.base, in amdgpu_connector_add()
1780 adev->mode_info.underscan_vborder_property, in amdgpu_connector_add()
1782 drm_object_attach_property(&amdgpu_connector->base.base, in amdgpu_connector_add()
1783 dev->mode_config.scaling_mode_property, in amdgpu_connector_add()
1787 drm_object_attach_property(&amdgpu_connector->base.base, in amdgpu_connector_add()
1788 adev->mode_info.audio_property, in amdgpu_connector_add()
1791 drm_object_attach_property(&amdgpu_connector->base.base, in amdgpu_connector_add()
1792 adev->mode_info.dither_property, in amdgpu_connector_add()
1795 amdgpu_connector->dac_load_detect = true; in amdgpu_connector_add()
1796 drm_object_attach_property(&amdgpu_connector->base.base, in amdgpu_connector_add()
1797 adev->mode_info.load_detect_property, in amdgpu_connector_add()
1800 connector->interlace_allowed = true; in amdgpu_connector_add()
1802 connector->doublescan_allowed = true; in amdgpu_connector_add()
1804 connector->doublescan_allowed = false; in amdgpu_connector_add()
1811 amdgpu_connector->con_priv = amdgpu_dig_connector; in amdgpu_connector_add()
1812 if (i2c_bus->valid) { in amdgpu_connector_add()
1813 amdgpu_connector->ddc_bus = amdgpu_i2c_lookup(adev, i2c_bus); in amdgpu_connector_add()
1814 if (!amdgpu_connector->ddc_bus) in amdgpu_connector_add()
1815 DRM_ERROR("HDMI: Failed to assign ddc bus! Check dmesg for i2c errors.\n"); in amdgpu_connector_add()
1817 ddc = &amdgpu_connector->ddc_bus->adapter; in amdgpu_connector_add()
1819 drm_connector_init_with_ddc(dev, &amdgpu_connector->base, in amdgpu_connector_add()
1822 ddc); in amdgpu_connector_add()
1823 drm_connector_helper_add(&amdgpu_connector->base, &amdgpu_connector_dvi_helper_funcs); in amdgpu_connector_add()
1824 drm_object_attach_property(&amdgpu_connector->base.base, in amdgpu_connector_add()
1825 adev->mode_info.coherent_mode_property, in amdgpu_connector_add()
1827 drm_object_attach_property(&amdgpu_connector->base.base, in amdgpu_connector_add()
1828 adev->mode_info.underscan_property, in amdgpu_connector_add()
1830 drm_object_attach_property(&amdgpu_connector->base.base, in amdgpu_connector_add()
1831 adev->mode_info.underscan_hborder_property, in amdgpu_connector_add()
1833 drm_object_attach_property(&amdgpu_connector->base.base, in amdgpu_connector_add()
1834 adev->mode_info.underscan_vborder_property, in amdgpu_connector_add()
1836 drm_object_attach_property(&amdgpu_connector->base.base, in amdgpu_connector_add()
1837 dev->mode_config.scaling_mode_property, in amdgpu_connector_add()
1840 drm_object_attach_property(&amdgpu_connector->base.base, in amdgpu_connector_add()
1841 adev->mode_info.audio_property, in amdgpu_connector_add()
1844 drm_object_attach_property(&amdgpu_connector->base.base, in amdgpu_connector_add()
1845 adev->mode_info.dither_property, in amdgpu_connector_add()
1848 connector->interlace_allowed = true; in amdgpu_connector_add()
1850 connector->doublescan_allowed = true; in amdgpu_connector_add()
1852 connector->doublescan_allowed = false; in amdgpu_connector_add()
1858 amdgpu_connector->con_priv = amdgpu_dig_connector; in amdgpu_connector_add()
1859 if (i2c_bus->valid) { in amdgpu_connector_add()
1860 amdgpu_connector->ddc_bus = amdgpu_i2c_lookup(adev, i2c_bus); in amdgpu_connector_add()
1861 if (amdgpu_connector->ddc_bus) { in amdgpu_connector_add()
1863 ddc = &amdgpu_connector->ddc_bus->adapter; in amdgpu_connector_add()
1865 DRM_ERROR("DP: Failed to assign ddc bus! Check dmesg for i2c errors.\n"); in amdgpu_connector_add()
1868 drm_connector_init_with_ddc(dev, &amdgpu_connector->base, in amdgpu_connector_add()
1871 ddc); in amdgpu_connector_add()
1872 drm_connector_helper_add(&amdgpu_connector->base, &amdgpu_connector_dp_helper_funcs); in amdgpu_connector_add()
1874 drm_object_attach_property(&amdgpu_connector->base.base, in amdgpu_connector_add()
1875 adev->mode_info.coherent_mode_property, in amdgpu_connector_add()
1877 drm_object_attach_property(&amdgpu_connector->base.base, in amdgpu_connector_add()
1878 adev->mode_info.underscan_property, in amdgpu_connector_add()
1880 drm_object_attach_property(&amdgpu_connector->base.base, in amdgpu_connector_add()
1881 adev->mode_info.underscan_hborder_property, in amdgpu_connector_add()
1883 drm_object_attach_property(&amdgpu_connector->base.base, in amdgpu_connector_add()
1884 adev->mode_info.underscan_vborder_property, in amdgpu_connector_add()
1886 drm_object_attach_property(&amdgpu_connector->base.base, in amdgpu_connector_add()
1887 dev->mode_config.scaling_mode_property, in amdgpu_connector_add()
1890 drm_object_attach_property(&amdgpu_connector->base.base, in amdgpu_connector_add()
1891 adev->mode_info.audio_property, in amdgpu_connector_add()
1894 drm_object_attach_property(&amdgpu_connector->base.base, in amdgpu_connector_add()
1895 adev->mode_info.dither_property, in amdgpu_connector_add()
1897 connector->interlace_allowed = true; in amdgpu_connector_add()
1899 connector->doublescan_allowed = false; in amdgpu_connector_add()
1905 amdgpu_connector->con_priv = amdgpu_dig_connector; in amdgpu_connector_add()
1906 if (i2c_bus->valid) { in amdgpu_connector_add()
1907 amdgpu_connector->ddc_bus = amdgpu_i2c_lookup(adev, i2c_bus); in amdgpu_connector_add()
1908 if (amdgpu_connector->ddc_bus) { in amdgpu_connector_add()
1910 ddc = &amdgpu_connector->ddc_bus->adapter; in amdgpu_connector_add()
1912 DRM_ERROR("DP: Failed to assign ddc bus! Check dmesg for i2c errors.\n"); in amdgpu_connector_add()
1915 drm_connector_init_with_ddc(dev, &amdgpu_connector->base, in amdgpu_connector_add()
1918 ddc); in amdgpu_connector_add()
1919 drm_connector_helper_add(&amdgpu_connector->base, &amdgpu_connector_dp_helper_funcs); in amdgpu_connector_add()
1920 drm_object_attach_property(&amdgpu_connector->base.base, in amdgpu_connector_add()
1921 dev->mode_config.scaling_mode_property, in amdgpu_connector_add()
1924 connector->interlace_allowed = false; in amdgpu_connector_add()
1925 connector->doublescan_allowed = false; in amdgpu_connector_add()
1931 amdgpu_connector->con_priv = amdgpu_dig_connector; in amdgpu_connector_add()
1932 if (i2c_bus->valid) { in amdgpu_connector_add()
1933 amdgpu_connector->ddc_bus = amdgpu_i2c_lookup(adev, i2c_bus); in amdgpu_connector_add()
1934 if (!amdgpu_connector->ddc_bus) in amdgpu_connector_add()
1935 DRM_ERROR("LVDS: Failed to assign ddc bus! Check dmesg for i2c errors.\n"); in amdgpu_connector_add()
1937 ddc = &amdgpu_connector->ddc_bus->adapter; in amdgpu_connector_add()
1939 drm_connector_init_with_ddc(dev, &amdgpu_connector->base, in amdgpu_connector_add()
1942 ddc); in amdgpu_connector_add()
1943 drm_connector_helper_add(&amdgpu_connector->base, &amdgpu_connector_lvds_helper_funcs); in amdgpu_connector_add()
1944 drm_object_attach_property(&amdgpu_connector->base.base, in amdgpu_connector_add()
1945 dev->mode_config.scaling_mode_property, in amdgpu_connector_add()
1948 connector->interlace_allowed = false; in amdgpu_connector_add()
1949 connector->doublescan_allowed = false; in amdgpu_connector_add()
1954 if (amdgpu_connector->hpd.hpd == AMDGPU_HPD_NONE) { in amdgpu_connector_add()
1955 if (i2c_bus->valid) { in amdgpu_connector_add()
1956 connector->polled = DRM_CONNECTOR_POLL_CONNECT | in amdgpu_connector_add()
1960 connector->polled = DRM_CONNECTOR_POLL_HPD; in amdgpu_connector_add()
1962 connector->display_info.subpixel_order = subpixel_order; in amdgpu_connector_add()
1969 drm_connector_attach_dp_subconnector_property(&amdgpu_connector->base); in amdgpu_connector_add()