Lines Matching defs:amdgpu_device
728 struct amdgpu_device { struct
729 struct device *dev;
730 struct pci_dev *pdev;
731 struct drm_device ddev;
734 struct amdgpu_acp acp;
736 struct amdgpu_hive_info *hive;
738 enum amd_asic_type asic_type;
739 uint32_t family;
740 uint32_t rev_id;
741 uint32_t external_rev_id;
742 unsigned long flags;
743 unsigned long apu_flags;
744 int usec_timeout;
745 const struct amdgpu_asic_funcs *asic_funcs;
746 bool shutdown;
747 bool need_swiotlb;
748 bool accel_working;
749 struct notifier_block acpi_nb;
750 struct amdgpu_i2c_chan *i2c_bus[AMDGPU_MAX_I2C_BUS];
751 struct amdgpu_debugfs debugfs[AMDGPU_DEBUGFS_MAX_COMPONENTS];
752 unsigned debugfs_count;
754 struct dentry *debugfs_preempt;
755 struct dentry *debugfs_regs[AMDGPU_DEBUGFS_MAX_COMPONENTS];
757 struct amdgpu_atif *atif;
758 struct amdgpu_atcs atcs;
759 struct mutex srbm_mutex;
761 struct mutex grbm_idx_mutex;
762 struct dev_pm_domain vga_pm_domain;
763 bool have_disp_power_ref;
764 bool have_atomics_support;
767 bool is_atom_fw;
768 uint8_t *bios;
769 uint32_t bios_size;
770 uint32_t bios_scratch_reg_offset;
771 uint32_t bios_scratch[AMDGPU_BIOS_NUM_SCRATCH];
774 resource_size_t rmmio_base;
775 resource_size_t rmmio_size;
776 void __iomem *rmmio;
778 spinlock_t mmio_idx_lock;
779 struct amdgpu_mmio_remap rmmio_remap;
781 spinlock_t smc_idx_lock;
782 amdgpu_rreg_t smc_rreg;
783 amdgpu_wreg_t smc_wreg;
785 spinlock_t pcie_idx_lock;
786 amdgpu_rreg_t pcie_rreg;
787 amdgpu_wreg_t pcie_wreg;
788 amdgpu_rreg_t pciep_rreg;
789 amdgpu_wreg_t pciep_wreg;
790 amdgpu_rreg64_t pcie_rreg64;
791 amdgpu_wreg64_t pcie_wreg64;
793 spinlock_t uvd_ctx_idx_lock;
794 amdgpu_rreg_t uvd_ctx_rreg;
795 amdgpu_wreg_t uvd_ctx_wreg;
797 spinlock_t didt_idx_lock;
798 amdgpu_rreg_t didt_rreg;
799 amdgpu_wreg_t didt_wreg;
801 spinlock_t gc_cac_idx_lock;
802 amdgpu_rreg_t gc_cac_rreg;
803 amdgpu_wreg_t gc_cac_wreg;
805 spinlock_t se_cac_idx_lock;
806 amdgpu_rreg_t se_cac_rreg;
807 amdgpu_wreg_t se_cac_wreg;
809 spinlock_t audio_endpt_idx_lock;
810 amdgpu_block_rreg_t audio_endpt_rreg;
811 amdgpu_block_wreg_t audio_endpt_wreg;
812 void __iomem *rio_mem;
813 resource_size_t rio_mem_size;
814 struct amdgpu_doorbell doorbell;
817 struct amdgpu_clock clock;
820 struct amdgpu_gmc gmc;
821 struct amdgpu_gart gart;
822 dma_addr_t dummy_page_addr;
823 struct amdgpu_vm_manager vm_manager;
824 struct amdgpu_vmhub vmhub[AMDGPU_MAX_VMHUBS];
825 unsigned num_vmhubs;
849 /* For pre-DCE11. DCE11 and later are in "struct amdgpu_device->dm" */ argument
850 struct work_struct hotplug_work;
851 struct amdgpu_irq_src crtc_irq;
852 struct amdgpu_irq_src vupdate_irq;
853 struct amdgpu_irq_src pageflip_irq;
854 struct amdgpu_irq_src hpd_irq;
857 u64 fence_context;
858 unsigned num_rings;
859 struct amdgpu_ring *rings[AMDGPU_MAX_RINGS];
860 bool ib_pool_ready;
861 struct amdgpu_sa_manager ib_pools[AMDGPU_IB_POOL_MAX];
862 struct amdgpu_sched gpu_sched[AMDGPU_HW_IP_NUM][AMDGPU_RING_PRIO_MAX];
865 struct amdgpu_irq irq;
868 struct amd_powerplay powerplay;
869 bool pp_force_state_enabled;
872 struct smu_context smu;
875 struct amdgpu_pm pm;
876 u32 cg_flags;
877 u32 pg_flags;
880 struct amdgpu_nbio nbio;
883 struct amdgpu_mmhub mmhub;
886 struct amdgpu_gfxhub gfxhub;
889 struct amdgpu_gfx gfx;
892 struct amdgpu_sdma sdma;
895 struct amdgpu_uvd uvd;
898 struct amdgpu_vce vce;
901 struct amdgpu_vcn vcn;
904 struct amdgpu_jpeg jpeg;
907 struct amdgpu_firmware firmware;
910 struct psp_context psp;
913 struct amdgpu_gds gds;
916 struct amdgpu_kfd_dev kfd;
919 struct amdgpu_umc umc;
922 struct amdgpu_display_manager dm;
925 bool enable_mes;
926 struct amdgpu_mes mes;
929 struct amdgpu_df df;
931 struct amdgpu_ip_block ip_blocks[AMDGPU_MAX_IP_NUM];
932 int num_ip_blocks;
933 struct mutex mn_lock;
937 atomic64_t vram_pin_size;
938 atomic64_t visible_pin_size;
939 atomic64_t gart_pin_size;
942 uint32_t *reg_offset[MAX_HWIP][HWIP_MAX_INSTANCE];
945 struct delayed_work delayed_init_work;
947 struct amdgpu_virt virt;
950 struct list_head shadow_list;
951 struct mutex shadow_list_lock;
954 bool has_hw_reset;
955 u8 reset_magic[AMDGPU_RESET_MAGIC_NUM];
958 bool in_suspend;
959 bool in_hibernate;
961 atomic_t in_gpu_reset;
962 enum pp_mp1_state mp1_state;
963 struct rw_semaphore reset_sem;
964 struct amdgpu_doorbell_index doorbell_index;
966 struct mutex notifier_lock;
968 int asic_reset_res;
969 struct work_struct xgmi_reset_work;
971 long gfx_timeout;
972 long sdma_timeout;
973 long video_timeout;
974 long compute_timeout;
976 uint64_t unique_id;
977 uint64_t df_perfmon_config_assign_mask[AMDGPU_MAX_DF_PERFMONS];
1001 static inline struct amdgpu_device *drm_to_adev(struct drm_device *ddev) in drm_to_adev() argument