Lines Matching +full:trig +full:- +full:gpios
1 // SPDX-License-Identifier: GPL-2.0
52 * MSIC has 24 gpios, 16 low voltage (1.2-1.8v) and 8 high voltage (3v).
53 * Both the high and low voltage gpios are divided in two banks.
54 * GPIOs are numbered with GPIO0LV0 as gpio_base in the following order:
64 return -EINVAL; in msic_gpio_to_ireg()
67 return INTEL_MSIC_GPIO0LV0CTLI - offset; in msic_gpio_to_ireg()
69 return INTEL_MSIC_GPIO1LV0CTLI - offset + 8; in msic_gpio_to_ireg()
71 return INTEL_MSIC_GPIO0HV0CTLI - offset + 16; in msic_gpio_to_ireg()
73 return INTEL_MSIC_GPIO1HV0CTLI - offset + 20; in msic_gpio_to_ireg()
79 return -EINVAL; in msic_gpio_to_oreg()
82 return INTEL_MSIC_GPIO0LV0CTLO - offset; in msic_gpio_to_oreg()
84 return INTEL_MSIC_GPIO1LV0CTLO - offset + 8; in msic_gpio_to_oreg()
86 return INTEL_MSIC_GPIO0HV0CTLO - offset + 16; in msic_gpio_to_oreg()
88 return INTEL_MSIC_GPIO1HV0CTLO - offset + 20; in msic_gpio_to_oreg()
147 * This is called from genirq with mg->buslock locked and
148 * irq_desc->lock held. We can not access the scu bus here, so we
154 u32 gpio = data->irq - mg->irq_base; in msic_irq_type()
156 if (gpio >= mg->chip.ngpio) in msic_irq_type()
157 return -EINVAL; in msic_irq_type()
160 mg->trig_change_mask |= (1 << gpio); in msic_irq_type()
161 mg->trig_type = type; in msic_irq_type()
169 return mg->irq_base + offset; in msic_gpio_to_irq()
175 mutex_lock(&mg->buslock); in msic_bus_lock()
183 u8 trig = 0; in msic_bus_sync_unlock() local
186 entire transaction. The irq_desc->lock is dropped before we are in msic_bus_sync_unlock()
188 if (mg->trig_change_mask) { in msic_bus_sync_unlock()
189 offset = __ffs(mg->trig_change_mask); in msic_bus_sync_unlock()
195 if (mg->trig_type & IRQ_TYPE_EDGE_RISING) in msic_bus_sync_unlock()
196 trig |= MSIC_GPIO_TRIG_RISE; in msic_bus_sync_unlock()
197 if (mg->trig_type & IRQ_TYPE_EDGE_FALLING) in msic_bus_sync_unlock()
198 trig |= MSIC_GPIO_TRIG_FALL; in msic_bus_sync_unlock()
200 intel_msic_reg_update(reg, trig, MSIC_GPIO_INTCNT_MASK); in msic_bus_sync_unlock()
201 mg->trig_change_mask = 0; in msic_bus_sync_unlock()
204 mutex_unlock(&mg->buslock); in msic_bus_sync_unlock()
213 .name = "MSIC-GPIO",
226 struct intel_msic *msic = pdev_to_intel_msic(mg->pdev); in msic_gpio_irq_handler()
232 for (i = 0; i < (mg->chip.ngpio / BITS_PER_BYTE); i++) { in msic_gpio_irq_handler()
237 generic_handle_irq(mg->irq_base + i * BITS_PER_BYTE + bitnr); in msic_gpio_irq_handler()
239 chip->irq_eoi(data); in msic_gpio_irq_handler()
244 struct device *dev = &pdev->dev; in platform_msic_gpio_probe()
256 if (!pdata || !pdata->gpio_base) { in platform_msic_gpio_probe()
258 return -EINVAL; in platform_msic_gpio_probe()
263 return -ENOMEM; in platform_msic_gpio_probe()
267 mg->pdev = pdev; in platform_msic_gpio_probe()
268 mg->irq = irq; in platform_msic_gpio_probe()
269 mg->irq_base = pdata->gpio_base + MSIC_GPIO_IRQ_OFFSET; in platform_msic_gpio_probe()
270 mg->chip.label = "msic_gpio"; in platform_msic_gpio_probe()
271 mg->chip.direction_input = msic_gpio_direction_input; in platform_msic_gpio_probe()
272 mg->chip.direction_output = msic_gpio_direction_output; in platform_msic_gpio_probe()
273 mg->chip.get = msic_gpio_get; in platform_msic_gpio_probe()
274 mg->chip.set = msic_gpio_set; in platform_msic_gpio_probe()
275 mg->chip.to_irq = msic_gpio_to_irq; in platform_msic_gpio_probe()
276 mg->chip.base = pdata->gpio_base; in platform_msic_gpio_probe()
277 mg->chip.ngpio = MSIC_NUM_GPIO; in platform_msic_gpio_probe()
278 mg->chip.can_sleep = true; in platform_msic_gpio_probe()
279 mg->chip.parent = dev; in platform_msic_gpio_probe()
281 mutex_init(&mg->buslock); in platform_msic_gpio_probe()
283 retval = gpiochip_add_data(&mg->chip, mg); in platform_msic_gpio_probe()
289 for (i = 0; i < mg->chip.ngpio; i++) { in platform_msic_gpio_probe()
290 irq_set_chip_data(i + mg->irq_base, mg); in platform_msic_gpio_probe()
291 irq_set_chip_and_handler(i + mg->irq_base, in platform_msic_gpio_probe()
295 irq_set_chained_handler_and_data(mg->irq, msic_gpio_irq_handler, mg); in platform_msic_gpio_probe()