Lines Matching +full:on +full:- +full:device
1 # SPDX-License-Identifier: GPL-2.0-only
17 depends on ARCH_SOCFPGA || COMPILE_TEST
23 depends on ARCH_SOCFPGA || COMPILE_TEST
35 depends on ALTERA_PR_IP_CORE && OF && HAS_IOMEM
42 depends on SPI
50 depends on PCI
52 FPGA manager driver support for Arria-V, Cyclone-V, Stratix-V,
57 depends on ARCH_ZYNQ || COMPILE_TEST
63 depends on (ARCH_STRATIX10 && INTEL_STRATIX10_SERVICE)
69 depends on SPI
76 depends on OF && SPI
82 depends on SPI
88 tristate "Technologic Systems TS-73xx SBC FPGA Manager"
89 depends on ARCH_EP93XX && MACH_TS72XX
92 present on the TS-73xx SBC boards.
102 depends on ARCH_SOCFPGA && FPGA_BRIDGE
109 depends on FPGA_BRIDGE && HAS_IOMEM
118 depends on FPGA_BRIDGE
119 depends on HAS_IOMEM
128 depends on FPGA_BRIDGE
135 tristate "FPGA Region Device Tree Overlay Support"
136 depends on OF && FPGA_REGION
138 Support for loading FPGA images by applying a Device Tree
142 tristate "FPGA Device Feature List (DFL) support"
145 depends on HAS_IOMEM
147 Device Feature List (DFL) defines a feature list structure that
154 Select this option to enable common support for Field-Programmable
155 Gate Array (FPGA) solutions which implement Device Feature List.
156 It provides enumeration APIs and feature device infrastructure.
160 depends on FPGA_DFL && HWMON && PERF_EVENTS
162 The FPGA Management Engine (FME) is a feature device implemented
163 under Device Feature List (DFL) framework. Select this option to
164 enable the platform device driver for FME which implements all
166 per DFL based FPGA device.
170 depends on FPGA_DFL_FME && HAS_IOMEM
176 depends on FPGA_DFL_FME && HAS_IOMEM
182 depends on FPGA_DFL_FME && HAS_IOMEM
188 depends on FPGA_DFL
193 Port/AFU per DFL based FPGA device.
196 tristate "FPGA DFL PCIe Device Driver"
197 depends on PCI && FPGA_DFL
199 Select this option to enable PCIe driver for PCIe-based
200 Field-Programmable Gate Array (FPGA) solutions which implement
201 the Device Feature List (DFL). This driver provides interfaces
203 FPGA accelerators on the FPGA DFL devices, enables system level
206 device drivers.
212 depends on ZYNQMP_FIRMWARE || (!ZYNQMP_FIRMWARE && COMPILE_TEST)
217 on ZynqMP SoC.