Lines Matching +full:cs +full:- +full:x
1 // SPDX-License-Identifier: GPL-2.0
10 #include <asm/hardware/cache-l2x0.h>
11 #include <asm/hardware/cache-aurora-l2.h>
27 #define SDRAM_ADDR_CTRL_SIZE_HIGH_OFFSET(cs) (20+cs) argument
28 #define SDRAM_ADDR_CTRL_SIZE_HIGH_MASK(cs) (0x1 << SDRAM_ADDR_CTRL_SIZE_HIGH_OFFSET(cs)) argument
29 #define SDRAM_ADDR_CTRL_ADDR_SEL_MASK(cs) BIT(16+cs) argument
30 #define SDRAM_ADDR_CTRL_SIZE_LOW_OFFSET(cs) (cs*4+2) argument
31 #define SDRAM_ADDR_CTRL_SIZE_LOW_MASK(cs) (0x3 << SDRAM_ADDR_CTRL_SIZE_LOW_OFFSET(cs)) argument
32 #define SDRAM_ADDR_CTRL_STRUCT_OFFSET(cs) (cs*4) argument
33 #define SDRAM_ADDR_CTRL_STRUCT_MASK(cs) (0x3 << SDRAM_ADDR_CTRL_STRUCT_OFFSET(cs)) argument
69 #define SDRAM_RANK_CTRL_EXIST_MASK(cs) BIT(cs) argument
83 uint8_t cs, uint8_t bank, uint16_t row, in axp_mc_calc_address() argument
86 if (drvdata->width == 8) { in axp_mc_calc_address()
88 if (drvdata->cs_addr_sel[cs]) in axp_mc_calc_address()
98 } else if (drvdata->width == 4) { in axp_mc_calc_address()
100 if (drvdata->cs_addr_sel[cs]) in axp_mc_calc_address()
112 if (drvdata->cs_addr_sel[cs]) in axp_mc_calc_address()
127 struct axp_mc_drvdata *drvdata = mci->pvt_info; in axp_mc_check()
132 char *msg = drvdata->msg; in axp_mc_check()
134 data_h = readl(drvdata->base + SDRAM_ERR_DATA_H_REG); in axp_mc_check()
135 data_l = readl(drvdata->base + SDRAM_ERR_DATA_L_REG); in axp_mc_check()
136 recv_ecc = readl(drvdata->base + SDRAM_ERR_RECV_ECC_REG); in axp_mc_check()
137 calc_ecc = readl(drvdata->base + SDRAM_ERR_CALC_ECC_REG); in axp_mc_check()
138 addr = readl(drvdata->base + SDRAM_ERR_ADDR_REG); in axp_mc_check()
139 cnt_sbe = readl(drvdata->base + SDRAM_ERR_SBE_COUNT_REG); in axp_mc_check()
140 cnt_dbe = readl(drvdata->base + SDRAM_ERR_DBE_COUNT_REG); in axp_mc_check()
141 cause_err = readl(drvdata->base + SDRAM_ERR_CAUSE_ERR_REG); in axp_mc_check()
142 cause_msg = readl(drvdata->base + SDRAM_ERR_CAUSE_MSG_REG); in axp_mc_check()
146 drvdata->base + SDRAM_ERR_CAUSE_ERR_REG); in axp_mc_check()
148 drvdata->base + SDRAM_ERR_CAUSE_MSG_REG); in axp_mc_check()
152 writel(0, drvdata->base + SDRAM_ERR_SBE_COUNT_REG); in axp_mc_check()
154 writel(0, drvdata->base + SDRAM_ERR_DBE_COUNT_REG); in axp_mc_check()
161 cnt_sbe--; in axp_mc_check()
163 dev_warn(mci->pdev, "inconsistent SBE count detected\n"); in axp_mc_check()
166 cnt_dbe--; in axp_mc_check()
168 dev_warn(mci->pdev, "inconsistent DBE count detected\n"); in axp_mc_check()
176 -1, -1, -1, /* top, mid, low layer */ in axp_mc_check()
177 mci->ctl_name, in axp_mc_check()
183 -1, -1, -1, /* top, mid, low layer */ in axp_mc_check()
184 mci->ctl_name, in axp_mc_check()
195 msg += sprintf(msg, "row=0x%04x ", row_val); /* 11 chars */ in axp_mc_check()
196 msg += sprintf(msg, "bank=0x%x ", bank_val); /* 9 chars */ in axp_mc_check()
197 msg += sprintf(msg, "col=0x%04x ", col_val); /* 11 chars */ in axp_mc_check()
198 msg += sprintf(msg, "cs=%d", cs_val); /* 4 chars */ in axp_mc_check()
206 cs_val, -1, -1, /* top, mid, low layer */ in axp_mc_check()
207 mci->ctl_name, drvdata->msg); in axp_mc_check()
214 cs_val, -1, -1, /* top, mid, low layer */ in axp_mc_check()
215 mci->ctl_name, drvdata->msg); in axp_mc_check()
221 struct axp_mc_drvdata *drvdata = mci->pvt_info; in axp_mc_read_config()
226 config = readl(drvdata->base + SDRAM_CONFIG_REG); in axp_mc_read_config()
229 drvdata->width = 8; in axp_mc_read_config()
232 drvdata->width = 4; in axp_mc_read_config()
234 addr_ctrl = readl(drvdata->base + SDRAM_ADDR_CTRL_REG); in axp_mc_read_config()
235 rank_ctrl = readl(drvdata->base + SDRAM_RANK_CTRL_REG); in axp_mc_read_config()
237 dimm = mci->dimms[i]; in axp_mc_read_config()
242 drvdata->cs_addr_sel[i] = in axp_mc_read_config()
246 … = ((addr_ctrl & SDRAM_ADDR_CTRL_SIZE_HIGH_MASK(i)) >> (SDRAM_ADDR_CTRL_SIZE_HIGH_OFFSET(i) - 2) | in axp_mc_read_config()
251 dimm->nr_pages = 524288; in axp_mc_read_config()
254 dimm->nr_pages = 65536; in axp_mc_read_config()
257 dimm->nr_pages = 131072; in axp_mc_read_config()
260 dimm->nr_pages = 262144; in axp_mc_read_config()
263 dimm->nr_pages = 1048576; in axp_mc_read_config()
266 dimm->nr_pages = 2097152; in axp_mc_read_config()
269 dimm->grain = 8; in axp_mc_read_config()
270 dimm->dtype = cs_struct ? DEV_X16 : DEV_X8; in axp_mc_read_config()
271 dimm->mtype = (config & SDRAM_CONFIG_REGISTERED_MASK) ? in axp_mc_read_config()
273 dimm->edac_mode = EDAC_SECDED; in axp_mc_read_config()
278 {.compatible = "marvell,armada-xp-sdram-controller",},
295 dev_err(&pdev->dev, "Unable to get mem resource\n"); in axp_mc_probe()
296 return -ENODEV; in axp_mc_probe()
299 base = devm_ioremap_resource(&pdev->dev, r); in axp_mc_probe()
301 dev_err(&pdev->dev, "Unable to map regs\n"); in axp_mc_probe()
307 dev_warn(&pdev->dev, "SDRAM ECC is not enabled\n"); in axp_mc_probe()
308 return -EINVAL; in axp_mc_probe()
317 return -ENOMEM; in axp_mc_probe()
319 drvdata = mci->pvt_info; in axp_mc_probe()
320 drvdata->base = base; in axp_mc_probe()
321 mci->pdev = &pdev->dev; in axp_mc_probe()
324 id = of_match_device(axp_mc_of_match, &pdev->dev); in axp_mc_probe()
325 mci->edac_check = axp_mc_check; in axp_mc_probe()
326 mci->mtype_cap = MEM_FLAG_DDR3; in axp_mc_probe()
327 mci->edac_cap = EDAC_FLAG_SECDED; in axp_mc_probe()
328 mci->mod_name = pdev->dev.driver->name; in axp_mc_probe()
329 mci->ctl_name = id ? id->compatible : "unknown"; in axp_mc_probe()
330 mci->dev_name = dev_name(&pdev->dev); in axp_mc_probe()
331 mci->scrub_mode = SCRUB_NONE; in axp_mc_probe()
337 of_machine_is_compatible("marvell,armadaxp-98dx3236")) in axp_mc_probe()
338 drvdata->width /= 2; in axp_mc_probe()
342 writel(1 << SDRAM_ERR_CTRL_THR_OFFSET, drvdata->base + SDRAM_ERR_CTRL_REG); in axp_mc_probe()
345 …writel(~(SDRAM_ERR_CAUSE_DBE_MASK | SDRAM_ERR_CAUSE_SBE_MASK), drvdata->base + SDRAM_ERR_CAUSE_ERR… in axp_mc_probe()
346 …writel(~(SDRAM_ERR_CAUSE_DBE_MASK | SDRAM_ERR_CAUSE_SBE_MASK), drvdata->base + SDRAM_ERR_CAUSE_MSG… in axp_mc_probe()
349 writel(0, drvdata->base + SDRAM_ERR_SBE_COUNT_REG); in axp_mc_probe()
350 writel(0, drvdata->base + SDRAM_ERR_DBE_COUNT_REG); in axp_mc_probe()
354 return -EINVAL; in axp_mc_probe()
365 edac_mc_del_mc(&pdev->dev); in axp_mc_remove()
399 drvdata->inject_addr &= AURORA_ERR_INJECT_CTL_ADDR_MASK; in aurora_l2_inject()
400 drvdata->inject_ctl &= AURORA_ERR_INJECT_CTL_EN_MASK; in aurora_l2_inject()
401 writel(0, drvdata->base + AURORA_ERR_INJECT_CTL_REG); in aurora_l2_inject()
402 writel(drvdata->inject_mask, drvdata->base + AURORA_ERR_INJECT_MASK_REG); in aurora_l2_inject()
403 writel(drvdata->inject_addr | drvdata->inject_ctl, drvdata->base + AURORA_ERR_INJECT_CTL_REG); in aurora_l2_inject()
409 struct aurora_l2_drvdata *drvdata = dci->pvt_info; in aurora_l2_check()
412 char *msg = drvdata->msg; in aurora_l2_check()
413 size_t size = sizeof(drvdata->msg); in aurora_l2_check()
416 cnt = readl(drvdata->base + AURORA_ERR_CNT_REG); in aurora_l2_check()
417 attr_cap = readl(drvdata->base + AURORA_ERR_ATTR_CAP_REG); in aurora_l2_check()
418 addr_cap = readl(drvdata->base + AURORA_ERR_ADDR_CAP_REG); in aurora_l2_check()
419 way_cap = readl(drvdata->base + AURORA_ERR_WAY_CAP_REG); in aurora_l2_check()
425 writel(AURORA_ERR_CNT_CLR, drvdata->base + AURORA_ERR_CNT_REG); in aurora_l2_check()
432 len += scnprintf(msg+len, size-len, "src=CPU%d ", src); in aurora_l2_check()
434 len += scnprintf(msg+len, size-len, "src=IO "); in aurora_l2_check()
439 len += scnprintf(msg+len, size-len, "txn=Data-Read "); in aurora_l2_check()
442 len += scnprintf(msg+len, size-len, "txn=Isn-Read "); in aurora_l2_check()
445 len += scnprintf(msg+len, size-len, "txn=Clean-Flush "); in aurora_l2_check()
448 len += scnprintf(msg+len, size-len, "txn=Eviction "); in aurora_l2_check()
451 len += scnprintf(msg+len, size-len, in aurora_l2_check()
452 "txn=Read-Modify-Write "); in aurora_l2_check()
459 len += scnprintf(msg+len, size-len, "err=CorrECC "); in aurora_l2_check()
462 len += scnprintf(msg+len, size-len, "err=UnCorrECC "); in aurora_l2_check()
465 len += scnprintf(msg+len, size-len, "err=TagParity "); in aurora_l2_check()
469 len += scnprintf(msg+len, size-len, "addr=0x%x ", addr_cap & AURORA_ERR_ADDR_CAP_ADDR_MASK); in aurora_l2_check()
470 …len += scnprintf(msg+len, size-len, "index=0x%x ", (way_cap & AURORA_ERR_WAY_IDX_MSK) >> AURORA_ER… in aurora_l2_check()
471 …len += scnprintf(msg+len, size-len, "way=0x%x", (way_cap & AURORA_ERR_WAY_CAP_WAY_MASK) >> AURORA_… in aurora_l2_check()
474 writel(AURORA_ERR_ATTR_CAP_VALID, drvdata->base + AURORA_ERR_ATTR_CAP_REG); in aurora_l2_check()
478 cnt_ue--; in aurora_l2_check()
479 edac_device_handle_ue(dci, 0, 0, drvdata->msg); in aurora_l2_check()
482 cnt_ce--; in aurora_l2_check()
483 edac_device_handle_ce(dci, 0, 0, drvdata->msg); in aurora_l2_check()
488 while (cnt_ue--) in aurora_l2_check()
490 while (cnt_ce--) in aurora_l2_check()
497 struct aurora_l2_drvdata *drvdata = dci->pvt_info; in aurora_l2_poll()
507 {.compatible = "marvell,aurora-system-cache",},
523 dev_err(&pdev->dev, "Unable to get mem resource\n"); in aurora_l2_probe()
524 return -ENODEV; in aurora_l2_probe()
527 base = devm_ioremap_resource(&pdev->dev, r); in aurora_l2_probe()
529 dev_err(&pdev->dev, "Unable to map regs\n"); in aurora_l2_probe()
535 dev_warn(&pdev->dev, "tag parity is not enabled\n"); in aurora_l2_probe()
537 dev_warn(&pdev->dev, "data ECC is not enabled\n"); in aurora_l2_probe()
542 return -ENOMEM; in aurora_l2_probe()
544 drvdata = dci->pvt_info; in aurora_l2_probe()
545 drvdata->base = base; in aurora_l2_probe()
546 dci->dev = &pdev->dev; in aurora_l2_probe()
549 id = of_match_device(aurora_l2_of_match, &pdev->dev); in aurora_l2_probe()
550 dci->edac_check = aurora_l2_poll; in aurora_l2_probe()
551 dci->mod_name = pdev->dev.driver->name; in aurora_l2_probe()
552 dci->ctl_name = id ? id->compatible : "unknown"; in aurora_l2_probe()
553 dci->dev_name = dev_name(&pdev->dev); in aurora_l2_probe()
556 writel(AURORA_ERR_CNT_CLR, drvdata->base + AURORA_ERR_CNT_REG); in aurora_l2_probe()
557 writel(AURORA_ERR_ATTR_CAP_VALID, drvdata->base + AURORA_ERR_ATTR_CAP_REG); in aurora_l2_probe()
561 return -EINVAL; in aurora_l2_probe()
565 drvdata->debugfs = edac_debugfs_create_dir(dev_name(&pdev->dev)); in aurora_l2_probe()
566 if (drvdata->debugfs) { in aurora_l2_probe()
568 drvdata->debugfs, in aurora_l2_probe()
569 &drvdata->inject_addr); in aurora_l2_probe()
571 drvdata->debugfs, in aurora_l2_probe()
572 &drvdata->inject_mask); in aurora_l2_probe()
574 drvdata->debugfs, &drvdata->inject_ctl); in aurora_l2_probe()
585 struct aurora_l2_drvdata *drvdata = dci->pvt_info; in aurora_l2_remove()
587 edac_debugfs_remove_recursive(drvdata->debugfs); in aurora_l2_remove()
589 edac_device_del_device(&pdev->dev); in aurora_l2_remove()