127 		int cid, int burst_mode, void __iomem *base);
133 		int cid, int burst_mode, void __iomem *base);
163 		int cid, int burst_mode, void __iomem *base)  in sirfsoc_dma_execute_hw_a7v2()  argument
194 		int cid, int burst_mode, void __iomem *base)  in sirfsoc_dma_execute_hw_a7v1()  argument
197 	writel_relaxed((1 << cid), base + SIRFSOC_DMA_EARLY_RESP_SET);  in sirfsoc_dma_execute_hw_a7v1()
198 	writel_relaxed(sdesc->width, base + SIRFSOC_DMA_WIDTH_0 + cid * 4);  in sirfsoc_dma_execute_hw_a7v1()
199 	writel_relaxed(cid | (burst_mode << SIRFSOC_DMA_MODE_CTRL_BIT) |  in sirfsoc_dma_execute_hw_a7v1()
201 		       base + cid * 0x10 + SIRFSOC_DMA_CH_CTRL);  in sirfsoc_dma_execute_hw_a7v1()
202 	writel_relaxed(sdesc->xlen, base + cid * 0x10 + SIRFSOC_DMA_CH_XLEN);  in sirfsoc_dma_execute_hw_a7v1()
203 	writel_relaxed(sdesc->ylen, base + cid * 0x10 + SIRFSOC_DMA_CH_YLEN);  in sirfsoc_dma_execute_hw_a7v1()
205 		       (1 << cid), base + SIRFSOC_DMA_INT_EN);  in sirfsoc_dma_execute_hw_a7v1()
206 	writel(sdesc->addr >> 2, base + cid * 0x10 + SIRFSOC_DMA_CH_ADDR);  in sirfsoc_dma_execute_hw_a7v1()
208 		writel((1 << cid) | 1 << (cid + 16) |  in sirfsoc_dma_execute_hw_a7v1()
216 		int cid, int burst_mode, void __iomem *base)  in sirfsoc_dma_execute_hw_a6()  argument
218 	writel_relaxed(sdesc->width, base + SIRFSOC_DMA_WIDTH_0 + cid * 4);  in sirfsoc_dma_execute_hw_a6()
219 	writel_relaxed(cid | (burst_mode << SIRFSOC_DMA_MODE_CTRL_BIT) |  in sirfsoc_dma_execute_hw_a6()
221 		       base + cid * 0x10 + SIRFSOC_DMA_CH_CTRL);  in sirfsoc_dma_execute_hw_a6()
222 	writel_relaxed(sdesc->xlen, base + cid * 0x10 + SIRFSOC_DMA_CH_XLEN);  in sirfsoc_dma_execute_hw_a6()
223 	writel_relaxed(sdesc->ylen, base + cid * 0x10 + SIRFSOC_DMA_CH_YLEN);  in sirfsoc_dma_execute_hw_a6()
225 		       (1 << cid), base + SIRFSOC_DMA_INT_EN);  in sirfsoc_dma_execute_hw_a6()
226 	writel(sdesc->addr >> 2, base + cid * 0x10 + SIRFSOC_DMA_CH_ADDR);  in sirfsoc_dma_execute_hw_a6()
228 		writel((1 << cid) | 1 << (cid + 16) |  in sirfsoc_dma_execute_hw_a6()
239 	int cid = schan->chan.chan_id;  in sirfsoc_dma_execute()  local
254 		cid = 0;  in sirfsoc_dma_execute()
257 	sdma->exec_desc(sdesc, cid, schan->mode, base);  in sirfsoc_dma_execute()
446 	int cid = schan->chan.chan_id;  in sirfsoc_dma_terminate_all()  local
453 		writel_relaxed(1 << cid, sdma->base + SIRFSOC_DMA_INT_EN_CLR);  in sirfsoc_dma_terminate_all()
454 		writel_relaxed(1 << cid, sdma->base + SIRFSOC_DMA_CH_INT);  in sirfsoc_dma_terminate_all()
455 		writel_relaxed((1 << cid) | 1 << (cid + 16),  in sirfsoc_dma_terminate_all()
458 		writel_relaxed(1 << cid, sdma->base + SIRFSOC_DMA_CH_VALID);  in sirfsoc_dma_terminate_all()
469 			       ~(1 << cid), sdma->base + SIRFSOC_DMA_INT_EN);  in sirfsoc_dma_terminate_all()
472 			       ~((1 << cid) | 1 << (cid + 16)),  in sirfsoc_dma_terminate_all()
474 		writel_relaxed(1 << cid, sdma->base + SIRFSOC_DMA_CH_VALID);  in sirfsoc_dma_terminate_all()
492 	int cid = schan->chan.chan_id;  in sirfsoc_dma_pause_chan()  local
499 		writel_relaxed((1 << cid) | 1 << (cid + 16),  in sirfsoc_dma_pause_chan()
509 			       ~((1 << cid) | 1 << (cid + 16)),  in sirfsoc_dma_pause_chan()
526 	int cid = schan->chan.chan_id;  in sirfsoc_dma_resume_chan()  local
532 		writel_relaxed((1 << cid) | 1 << (cid + 16),  in sirfsoc_dma_resume_chan()
542 			       ((1 << cid) | 1 << (cid + 16)),  in sirfsoc_dma_resume_chan()
648 	int cid = schan->chan.chan_id;  in sirfsoc_dma_tx_status()  local
671 		cid = 0;  in sirfsoc_dma_tx_status()
677 			sdma->base + cid * 0x10 + SIRFSOC_DMA_CH_ADDR) << 2;  in sirfsoc_dma_tx_status()