11 #include "dw-edma-core.h"
12 #include "dw-edma-v0-core.h"
13 #include "dw-edma-v0-regs.h"
14 #include "dw-edma-v0-debugfs.h"
26 static inline struct dw_edma_v0_regs __iomem *__dw_regs(struct dw_edma *dw)  in __dw_regs()  argument
28 	return dw->rg_region.vaddr;  in __dw_regs()
31 #define SET(dw, name, value)				\  argument
32 	writel(value, &(__dw_regs(dw)->name))
34 #define GET(dw, name)					\  argument
35 	readl(&(__dw_regs(dw)->name))
37 #define SET_RW(dw, dir, name, value)			\  argument
40 			SET(dw, wr_##name, value);	\
42 			SET(dw, rd_##name, value);	\
45 #define GET_RW(dw, dir, name)				\  argument
47 	  ? GET(dw, wr_##name)				\
48 	  : GET(dw, rd_##name))
50 #define SET_BOTH(dw, name, value)			\  argument
52 		SET(dw, wr_##name, value);		\
53 		SET(dw, rd_##name, value);		\
57 __dw_ch_regs(struct dw_edma *dw, enum dw_edma_dir dir, u16 ch)  in __dw_ch_regs()  argument
59 	if (dw->mode == EDMA_MODE_LEGACY)  in __dw_ch_regs()
60 		return &(__dw_regs(dw)->type.legacy.ch);  in __dw_ch_regs()
63 		return &__dw_regs(dw)->type.unroll.ch[ch].wr;  in __dw_ch_regs()
65 	return &__dw_regs(dw)->type.unroll.ch[ch].rd;  in __dw_ch_regs()
68 static inline void writel_ch(struct dw_edma *dw, enum dw_edma_dir dir, u16 ch,  in writel_ch()  argument
71 	if (dw->mode == EDMA_MODE_LEGACY) {  in writel_ch()
75 		raw_spin_lock_irqsave(&dw->lock, flags);  in writel_ch()
82 		       &(__dw_regs(dw)->type.legacy.viewport_sel));  in writel_ch()
85 		raw_spin_unlock_irqrestore(&dw->lock, flags);  in writel_ch()
91 static inline u32 readl_ch(struct dw_edma *dw, enum dw_edma_dir dir, u16 ch,  in readl_ch()  argument
96 	if (dw->mode == EDMA_MODE_LEGACY) {  in readl_ch()
100 		raw_spin_lock_irqsave(&dw->lock, flags);  in readl_ch()
107 		       &(__dw_regs(dw)->type.legacy.viewport_sel));  in readl_ch()
110 		raw_spin_unlock_irqrestore(&dw->lock, flags);  in readl_ch()
118 #define SET_CH(dw, dir, ch, name, value) \  argument
119 	writel_ch(dw, dir, ch, value, &(__dw_ch_regs(dw, dir, ch)->name))
121 #define GET_CH(dw, dir, ch, name) \  argument
122 	readl_ch(dw, dir, ch, &(__dw_ch_regs(dw, dir, ch)->name))
128 void dw_edma_v0_core_off(struct dw_edma *dw)  in dw_edma_v0_core_off()  argument
130 	SET_BOTH(dw, int_mask, EDMA_V0_DONE_INT_MASK | EDMA_V0_ABORT_INT_MASK);  in dw_edma_v0_core_off()
131 	SET_BOTH(dw, int_clear, EDMA_V0_DONE_INT_MASK | EDMA_V0_ABORT_INT_MASK);  in dw_edma_v0_core_off()
132 	SET_BOTH(dw, engine_en, 0);  in dw_edma_v0_core_off()
135 u16 dw_edma_v0_core_ch_count(struct dw_edma *dw, enum dw_edma_dir dir)  in dw_edma_v0_core_ch_count()  argument
140 		num_ch = FIELD_GET(EDMA_V0_WRITE_CH_COUNT_MASK, GET(dw, ctrl));  in dw_edma_v0_core_ch_count()
142 		num_ch = FIELD_GET(EDMA_V0_READ_CH_COUNT_MASK, GET(dw, ctrl));  in dw_edma_v0_core_ch_count()
152 	struct dw_edma *dw = chan->chip->dw;  in dw_edma_v0_core_ch_status()  local
156 			GET_CH(dw, chan->dir, chan->id, ch_control1));  in dw_edma_v0_core_ch_status()
168 	struct dw_edma *dw = chan->chip->dw;  in dw_edma_v0_core_clear_done_int()  local
170 	SET_RW(dw, chan->dir, int_clear,  in dw_edma_v0_core_clear_done_int()
176 	struct dw_edma *dw = chan->chip->dw;  in dw_edma_v0_core_clear_abort_int()  local
178 	SET_RW(dw, chan->dir, int_clear,  in dw_edma_v0_core_clear_abort_int()
182 u32 dw_edma_v0_core_status_done_int(struct dw_edma *dw, enum dw_edma_dir dir)  in dw_edma_v0_core_status_done_int()  argument
184 	return FIELD_GET(EDMA_V0_DONE_INT_MASK, GET_RW(dw, dir, int_status));  in dw_edma_v0_core_status_done_int()
187 u32 dw_edma_v0_core_status_abort_int(struct dw_edma *dw, enum dw_edma_dir dir)  in dw_edma_v0_core_status_abort_int()  argument
189 	return FIELD_GET(EDMA_V0_ABORT_INT_MASK, GET_RW(dw, dir, int_status));  in dw_edma_v0_core_status_abort_int()
239 	struct dw_edma *dw = chan->chip->dw;  in dw_edma_v0_core_start()  local
246 		SET_RW(dw, chan->dir, engine_en, BIT(0));  in dw_edma_v0_core_start()
248 		tmp = GET_RW(dw, chan->dir, int_mask);  in dw_edma_v0_core_start()
251 		SET_RW(dw, chan->dir, int_mask, tmp);  in dw_edma_v0_core_start()
253 		tmp = GET_RW(dw, chan->dir, linked_list_err_en);  in dw_edma_v0_core_start()
255 		SET_RW(dw, chan->dir, linked_list_err_en, tmp);  in dw_edma_v0_core_start()
257 		SET_CH(dw, chan->dir, chan->id, ch_control1,  in dw_edma_v0_core_start()
260 		SET_CH(dw, chan->dir, chan->id, llp_low,  in dw_edma_v0_core_start()
262 		SET_CH(dw, chan->dir, chan->id, llp_high,  in dw_edma_v0_core_start()
266 	SET_RW(dw, chan->dir, doorbell,  in dw_edma_v0_core_start()
272 	struct dw_edma *dw = chan->chip->dw;  in dw_edma_v0_core_device_config()  local
276 	SET_RW(dw, chan->dir, done_imwr_low, chan->msi.address_lo);  in dw_edma_v0_core_device_config()
277 	SET_RW(dw, chan->dir, done_imwr_high, chan->msi.address_hi);  in dw_edma_v0_core_device_config()
279 	SET_RW(dw, chan->dir, abort_imwr_low, chan->msi.address_lo);  in dw_edma_v0_core_device_config()
280 	SET_RW(dw, chan->dir, abort_imwr_high, chan->msi.address_hi);  in dw_edma_v0_core_device_config()
285 		tmp = GET_RW(dw, chan->dir, ch01_imwr_data);  in dw_edma_v0_core_device_config()
290 		tmp = GET_RW(dw, chan->dir, ch23_imwr_data);  in dw_edma_v0_core_device_config()
295 		tmp = GET_RW(dw, chan->dir, ch45_imwr_data);  in dw_edma_v0_core_device_config()
300 		tmp = GET_RW(dw, chan->dir, ch67_imwr_data);  in dw_edma_v0_core_device_config()
319 		SET_RW(dw, chan->dir, ch01_imwr_data, tmp);  in dw_edma_v0_core_device_config()
324 		SET_RW(dw, chan->dir, ch23_imwr_data, tmp);  in dw_edma_v0_core_device_config()
329 		SET_RW(dw, chan->dir, ch45_imwr_data, tmp);  in dw_edma_v0_core_device_config()
334 		SET_RW(dw, chan->dir, ch67_imwr_data, tmp);  in dw_edma_v0_core_device_config()