Lines Matching +full:stm32f756 +full:- +full:hash
1 // SPDX-License-Identifier: GPL-2.0-only
5 * Copyright (C) 2017, STMicroelectronics - All Rights Reserved
12 #include <linux/dma-mapping.h>
25 #include <crypto/hash.h>
29 #include <crypto/internal/hash.h>
197 return readl_relaxed(hdev->io_base + offset); in stm32_hash_read()
203 writel_relaxed(value, hdev->io_base + offset); in stm32_hash_write()
210 return readl_relaxed_poll_timeout(hdev->io_base + HASH_SR, status, in stm32_hash_wait_busy()
226 struct crypto_ahash *tfm = crypto_ahash_reqtfm(hdev->req); in stm32_hash_write_key()
229 int keylen = ctx->keylen; in stm32_hash_write_key()
230 void *key = ctx->key; in stm32_hash_write_key()
237 keylen -= 4; in stm32_hash_write_key()
245 return -EINPROGRESS; in stm32_hash_write_key()
253 struct stm32_hash_request_ctx *rctx = ahash_request_ctx(hdev->req); in stm32_hash_write_ctrl()
254 struct crypto_ahash *tfm = crypto_ahash_reqtfm(hdev->req); in stm32_hash_write_ctrl()
259 if (!(hdev->flags & HASH_FLAGS_INIT)) { in stm32_hash_write_ctrl()
260 switch (rctx->flags & HASH_FLAGS_ALGO_MASK) { in stm32_hash_write_ctrl()
277 reg |= (rctx->data_type << HASH_CR_DATATYPE_POS); in stm32_hash_write_ctrl()
279 if (rctx->flags & HASH_FLAGS_HMAC) { in stm32_hash_write_ctrl()
280 hdev->flags |= HASH_FLAGS_HMAC; in stm32_hash_write_ctrl()
282 if (ctx->keylen > HASH_LONG_KEY) in stm32_hash_write_ctrl()
290 hdev->flags |= HASH_FLAGS_INIT; in stm32_hash_write_ctrl()
292 dev_dbg(hdev->dev, "Write Control %x\n", reg); in stm32_hash_write_ctrl()
300 while ((rctx->bufcnt < rctx->buflen) && rctx->total) { in stm32_hash_append_sg()
301 count = min(rctx->sg->length - rctx->offset, rctx->total); in stm32_hash_append_sg()
302 count = min(count, rctx->buflen - rctx->bufcnt); in stm32_hash_append_sg()
305 if ((rctx->sg->length == 0) && !sg_is_last(rctx->sg)) { in stm32_hash_append_sg()
306 rctx->sg = sg_next(rctx->sg); in stm32_hash_append_sg()
313 scatterwalk_map_and_copy(rctx->buffer + rctx->bufcnt, rctx->sg, in stm32_hash_append_sg()
314 rctx->offset, count, 0); in stm32_hash_append_sg()
316 rctx->bufcnt += count; in stm32_hash_append_sg()
317 rctx->offset += count; in stm32_hash_append_sg()
318 rctx->total -= count; in stm32_hash_append_sg()
320 if (rctx->offset == rctx->sg->length) { in stm32_hash_append_sg()
321 rctx->sg = sg_next(rctx->sg); in stm32_hash_append_sg()
322 if (rctx->sg) in stm32_hash_append_sg()
323 rctx->offset = 0; in stm32_hash_append_sg()
325 rctx->total = 0; in stm32_hash_append_sg()
338 hdev->flags |= HASH_FLAGS_FINAL; in stm32_hash_xmit_cpu()
342 dev_dbg(hdev->dev, "%s: length: %zd, final: %x len32 %i\n", in stm32_hash_xmit_cpu()
345 hdev->flags |= HASH_FLAGS_CPU; in stm32_hash_xmit_cpu()
350 return -ETIMEDOUT; in stm32_hash_xmit_cpu()
352 if ((hdev->flags & HASH_FLAGS_HMAC) && in stm32_hash_xmit_cpu()
353 (!(hdev->flags & HASH_FLAGS_HMAC_KEY))) { in stm32_hash_xmit_cpu()
354 hdev->flags |= HASH_FLAGS_HMAC_KEY; in stm32_hash_xmit_cpu()
357 return -ETIMEDOUT; in stm32_hash_xmit_cpu()
368 if (hdev->flags & HASH_FLAGS_HMAC) { in stm32_hash_xmit_cpu()
370 return -ETIMEDOUT; in stm32_hash_xmit_cpu()
373 return -EINPROGRESS; in stm32_hash_xmit_cpu()
381 struct stm32_hash_request_ctx *rctx = ahash_request_ctx(hdev->req); in stm32_hash_update_cpu()
384 dev_dbg(hdev->dev, "%s flags %lx\n", __func__, rctx->flags); in stm32_hash_update_cpu()
386 final = (rctx->flags & HASH_FLAGS_FINUP); in stm32_hash_update_cpu()
388 while ((rctx->total >= rctx->buflen) || in stm32_hash_update_cpu()
389 (rctx->bufcnt + rctx->total >= rctx->buflen)) { in stm32_hash_update_cpu()
391 bufcnt = rctx->bufcnt; in stm32_hash_update_cpu()
392 rctx->bufcnt = 0; in stm32_hash_update_cpu()
393 err = stm32_hash_xmit_cpu(hdev, rctx->buffer, bufcnt, 0); in stm32_hash_update_cpu()
399 bufcnt = rctx->bufcnt; in stm32_hash_update_cpu()
400 rctx->bufcnt = 0; in stm32_hash_update_cpu()
401 err = stm32_hash_xmit_cpu(hdev, rctx->buffer, bufcnt, in stm32_hash_update_cpu()
402 (rctx->flags & HASH_FLAGS_FINUP)); in stm32_hash_update_cpu()
416 in_desc = dmaengine_prep_slave_sg(hdev->dma_lch, sg, 1, in stm32_hash_xmit_dma()
420 dev_err(hdev->dev, "dmaengine_prep_slave error\n"); in stm32_hash_xmit_dma()
421 return -ENOMEM; in stm32_hash_xmit_dma()
424 reinit_completion(&hdev->dma_completion); in stm32_hash_xmit_dma()
425 in_desc->callback = stm32_hash_dma_callback; in stm32_hash_xmit_dma()
426 in_desc->callback_param = hdev; in stm32_hash_xmit_dma()
428 hdev->flags |= HASH_FLAGS_FINAL; in stm32_hash_xmit_dma()
429 hdev->flags |= HASH_FLAGS_DMA_ACTIVE; in stm32_hash_xmit_dma()
447 return -ENOMEM; in stm32_hash_xmit_dma()
449 dma_async_issue_pending(hdev->dma_lch); in stm32_hash_xmit_dma()
451 if (!wait_for_completion_timeout(&hdev->dma_completion, in stm32_hash_xmit_dma()
453 err = -ETIMEDOUT; in stm32_hash_xmit_dma()
455 if (dma_async_is_tx_complete(hdev->dma_lch, cookie, in stm32_hash_xmit_dma()
457 err = -ETIMEDOUT; in stm32_hash_xmit_dma()
460 dev_err(hdev->dev, "DMA Error %i\n", err); in stm32_hash_xmit_dma()
461 dmaengine_terminate_all(hdev->dma_lch); in stm32_hash_xmit_dma()
465 return -EINPROGRESS; in stm32_hash_xmit_dma()
472 complete(&hdev->dma_completion); in stm32_hash_dma_callback()
474 hdev->flags |= HASH_FLAGS_DMA_READY; in stm32_hash_dma_callback()
479 struct stm32_hash_request_ctx *rctx = ahash_request_ctx(hdev->req); in stm32_hash_hmac_dma_send()
480 struct crypto_ahash *tfm = crypto_ahash_reqtfm(hdev->req); in stm32_hash_hmac_dma_send()
484 if (ctx->keylen < HASH_DMA_THRESHOLD || (hdev->dma_mode == 1)) { in stm32_hash_hmac_dma_send()
487 return -ETIMEDOUT; in stm32_hash_hmac_dma_send()
489 if (!(hdev->flags & HASH_FLAGS_HMAC_KEY)) in stm32_hash_hmac_dma_send()
490 sg_init_one(&rctx->sg_key, ctx->key, in stm32_hash_hmac_dma_send()
491 ALIGN(ctx->keylen, sizeof(u32))); in stm32_hash_hmac_dma_send()
493 rctx->dma_ct = dma_map_sg(hdev->dev, &rctx->sg_key, 1, in stm32_hash_hmac_dma_send()
495 if (rctx->dma_ct == 0) { in stm32_hash_hmac_dma_send()
496 dev_err(hdev->dev, "dma_map_sg error\n"); in stm32_hash_hmac_dma_send()
497 return -ENOMEM; in stm32_hash_hmac_dma_send()
500 err = stm32_hash_xmit_dma(hdev, &rctx->sg_key, ctx->keylen, 0); in stm32_hash_hmac_dma_send()
502 dma_unmap_sg(hdev->dev, &rctx->sg_key, 1, DMA_TO_DEVICE); in stm32_hash_hmac_dma_send()
517 dma_conf.dst_addr = hdev->phys_base + HASH_DIN; in stm32_hash_dma_init()
519 dma_conf.src_maxburst = hdev->dma_maxburst; in stm32_hash_dma_init()
520 dma_conf.dst_maxburst = hdev->dma_maxburst; in stm32_hash_dma_init()
523 chan = dma_request_chan(hdev->dev, "in"); in stm32_hash_dma_init()
527 hdev->dma_lch = chan; in stm32_hash_dma_init()
529 err = dmaengine_slave_config(hdev->dma_lch, &dma_conf); in stm32_hash_dma_init()
531 dma_release_channel(hdev->dma_lch); in stm32_hash_dma_init()
532 hdev->dma_lch = NULL; in stm32_hash_dma_init()
533 dev_err(hdev->dev, "Couldn't configure DMA slave.\n"); in stm32_hash_dma_init()
537 init_completion(&hdev->dma_completion); in stm32_hash_dma_init()
544 struct stm32_hash_request_ctx *rctx = ahash_request_ctx(hdev->req); in stm32_hash_dma_send()
548 u32 *buffer = (void *)rctx->buffer; in stm32_hash_dma_send()
550 rctx->sg = hdev->req->src; in stm32_hash_dma_send()
551 rctx->total = hdev->req->nbytes; in stm32_hash_dma_send()
553 rctx->nents = sg_nents(rctx->sg); in stm32_hash_dma_send()
555 if (rctx->nents < 0) in stm32_hash_dma_send()
556 return -EINVAL; in stm32_hash_dma_send()
560 if (hdev->flags & HASH_FLAGS_HMAC) { in stm32_hash_dma_send()
562 if (err != -EINPROGRESS) in stm32_hash_dma_send()
566 for_each_sg(rctx->sg, tsg, rctx->nents, i) { in stm32_hash_dma_send()
567 len = sg->length; in stm32_hash_dma_send()
571 if (hdev->dma_mode == 1) { in stm32_hash_dma_send()
572 len = (ALIGN(sg->length, 16) - 16); in stm32_hash_dma_send()
575 rctx->sg, rctx->nents, in stm32_hash_dma_send()
576 rctx->buffer, sg->length - len, in stm32_hash_dma_send()
577 rctx->total - sg->length + len); in stm32_hash_dma_send()
579 sg->length = len; in stm32_hash_dma_send()
581 if (!(IS_ALIGNED(sg->length, sizeof(u32)))) { in stm32_hash_dma_send()
582 len = sg->length; in stm32_hash_dma_send()
583 sg->length = ALIGN(sg->length, in stm32_hash_dma_send()
589 rctx->dma_ct = dma_map_sg(hdev->dev, sg, 1, in stm32_hash_dma_send()
591 if (rctx->dma_ct == 0) { in stm32_hash_dma_send()
592 dev_err(hdev->dev, "dma_map_sg error\n"); in stm32_hash_dma_send()
593 return -ENOMEM; in stm32_hash_dma_send()
599 dma_unmap_sg(hdev->dev, sg, 1, DMA_TO_DEVICE); in stm32_hash_dma_send()
601 if (err == -ENOMEM) in stm32_hash_dma_send()
605 if (hdev->dma_mode == 1) { in stm32_hash_dma_send()
607 return -ETIMEDOUT; in stm32_hash_dma_send()
615 DIV_ROUND_UP(ncp, sizeof(u32)) - ncp); in stm32_hash_dma_send()
616 writesl(hdev->io_base + HASH_DIN, buffer, in stm32_hash_dma_send()
623 err = -EINPROGRESS; in stm32_hash_dma_send()
626 if (hdev->flags & HASH_FLAGS_HMAC) { in stm32_hash_dma_send()
628 return -ETIMEDOUT; in stm32_hash_dma_send()
640 if (!ctx->hdev) { in stm32_hash_find_dev()
645 ctx->hdev = hdev; in stm32_hash_find_dev()
647 hdev = ctx->hdev; in stm32_hash_find_dev()
662 if (req->nbytes <= HASH_DMA_THRESHOLD) in stm32_hash_dma_aligned_data()
665 if (sg_nents(req->src) > 1) { in stm32_hash_dma_aligned_data()
666 if (hdev->dma_mode == 1) in stm32_hash_dma_aligned_data()
668 for_each_sg(req->src, sg, sg_nents(req->src), i) { in stm32_hash_dma_aligned_data()
669 if ((!IS_ALIGNED(sg->length, sizeof(u32))) && in stm32_hash_dma_aligned_data()
675 if (req->src->offset % 4) in stm32_hash_dma_aligned_data()
688 rctx->hdev = hdev; in stm32_hash_init()
690 rctx->flags = HASH_FLAGS_CPU; in stm32_hash_init()
692 rctx->digcnt = crypto_ahash_digestsize(tfm); in stm32_hash_init()
693 switch (rctx->digcnt) { in stm32_hash_init()
695 rctx->flags |= HASH_FLAGS_MD5; in stm32_hash_init()
698 rctx->flags |= HASH_FLAGS_SHA1; in stm32_hash_init()
701 rctx->flags |= HASH_FLAGS_SHA224; in stm32_hash_init()
704 rctx->flags |= HASH_FLAGS_SHA256; in stm32_hash_init()
707 return -EINVAL; in stm32_hash_init()
710 rctx->bufcnt = 0; in stm32_hash_init()
711 rctx->buflen = HASH_BUFLEN; in stm32_hash_init()
712 rctx->total = 0; in stm32_hash_init()
713 rctx->offset = 0; in stm32_hash_init()
714 rctx->data_type = HASH_DATA_8_BITS; in stm32_hash_init()
716 memset(rctx->buffer, 0, HASH_BUFLEN); in stm32_hash_init()
718 if (ctx->flags & HASH_FLAGS_HMAC) in stm32_hash_init()
719 rctx->flags |= HASH_FLAGS_HMAC; in stm32_hash_init()
721 dev_dbg(hdev->dev, "%s Flags %lx\n", __func__, rctx->flags); in stm32_hash_init()
733 struct ahash_request *req = hdev->req; in stm32_hash_final_req()
736 int buflen = rctx->bufcnt; in stm32_hash_final_req()
738 rctx->bufcnt = 0; in stm32_hash_final_req()
740 if (!(rctx->flags & HASH_FLAGS_CPU)) in stm32_hash_final_req()
743 err = stm32_hash_xmit_cpu(hdev, rctx->buffer, buflen, 1); in stm32_hash_final_req()
752 __be32 *hash = (void *)rctx->digest; in stm32_hash_copy_hash() local
755 switch (rctx->flags & HASH_FLAGS_ALGO_MASK) { in stm32_hash_copy_hash()
773 hash[i] = cpu_to_be32(stm32_hash_read(rctx->hdev, in stm32_hash_copy_hash()
781 if (!req->result) in stm32_hash_finish()
782 return -EINVAL; in stm32_hash_finish()
784 memcpy(req->result, rctx->digest, rctx->digcnt); in stm32_hash_finish()
792 struct stm32_hash_dev *hdev = rctx->hdev; in stm32_hash_finish_req()
794 if (!err && (HASH_FLAGS_FINAL & hdev->flags)) { in stm32_hash_finish_req()
797 hdev->flags &= ~(HASH_FLAGS_FINAL | HASH_FLAGS_CPU | in stm32_hash_finish_req()
803 rctx->flags |= HASH_FLAGS_ERRORS; in stm32_hash_finish_req()
806 pm_runtime_mark_last_busy(hdev->dev); in stm32_hash_finish_req()
807 pm_runtime_put_autosuspend(hdev->dev); in stm32_hash_finish_req()
809 crypto_finalize_hash_request(hdev->engine, req, err); in stm32_hash_finish_req()
815 pm_runtime_get_sync(hdev->dev); in stm32_hash_hw_init()
817 if (!(HASH_FLAGS_INIT & hdev->flags)) { in stm32_hash_hw_init()
822 hdev->err = 0; in stm32_hash_hw_init()
834 return crypto_transfer_hash_request_to_engine(hdev->engine, req); in stm32_hash_handle_queue()
846 return -ENODEV; in stm32_hash_prepare_req()
848 hdev->req = req; in stm32_hash_prepare_req()
852 dev_dbg(hdev->dev, "processing new req, op: %lu, nbytes %d\n", in stm32_hash_prepare_req()
853 rctx->op, req->nbytes); in stm32_hash_prepare_req()
868 return -ENODEV; in stm32_hash_one_request()
870 hdev->req = req; in stm32_hash_one_request()
874 if (rctx->op == HASH_OP_UPDATE) in stm32_hash_one_request()
876 else if (rctx->op == HASH_OP_FINAL) in stm32_hash_one_request()
879 if (err != -EINPROGRESS) in stm32_hash_one_request()
889 struct stm32_hash_ctx *ctx = crypto_tfm_ctx(req->base.tfm); in stm32_hash_enqueue()
890 struct stm32_hash_dev *hdev = ctx->hdev; in stm32_hash_enqueue()
892 rctx->op = op; in stm32_hash_enqueue()
901 if (!req->nbytes || !(rctx->flags & HASH_FLAGS_CPU)) in stm32_hash_update()
904 rctx->total = req->nbytes; in stm32_hash_update()
905 rctx->sg = req->src; in stm32_hash_update()
906 rctx->offset = 0; in stm32_hash_update()
908 if ((rctx->bufcnt + rctx->total < rctx->buflen)) { in stm32_hash_update()
920 rctx->flags |= HASH_FLAGS_FINUP; in stm32_hash_final()
932 rctx->flags |= HASH_FLAGS_FINUP; in stm32_hash_finup()
934 if (hdev->dma_lch && stm32_hash_dma_aligned_data(req)) in stm32_hash_finup()
935 rctx->flags &= ~HASH_FLAGS_CPU; in stm32_hash_finup()
939 if (err1 == -EINPROGRESS || err1 == -EBUSY) in stm32_hash_finup()
964 pm_runtime_get_sync(hdev->dev); in stm32_hash_export()
969 rctx->hw_context = kmalloc_array(3 + HASH_CSR_REGISTER_NUMBER, in stm32_hash_export()
973 preg = rctx->hw_context; in stm32_hash_export()
981 pm_runtime_mark_last_busy(hdev->dev); in stm32_hash_export()
982 pm_runtime_put_autosuspend(hdev->dev); in stm32_hash_export()
1000 preg = rctx->hw_context; in stm32_hash_import()
1002 pm_runtime_get_sync(hdev->dev); in stm32_hash_import()
1013 pm_runtime_mark_last_busy(hdev->dev); in stm32_hash_import()
1014 pm_runtime_put_autosuspend(hdev->dev); in stm32_hash_import()
1016 kfree(rctx->hw_context); in stm32_hash_import()
1027 memcpy(ctx->key, key, keylen); in stm32_hash_setkey()
1028 ctx->keylen = keylen; in stm32_hash_setkey()
1030 return -ENOMEM; in stm32_hash_setkey()
1044 ctx->keylen = 0; in stm32_hash_cra_init_algs()
1047 ctx->flags |= HASH_FLAGS_HMAC; in stm32_hash_cra_init_algs()
1049 ctx->enginectx.op.do_one_request = stm32_hash_one_request; in stm32_hash_cra_init_algs()
1050 ctx->enginectx.op.prepare_request = stm32_hash_prepare_req; in stm32_hash_cra_init_algs()
1051 ctx->enginectx.op.unprepare_request = NULL; in stm32_hash_cra_init_algs()
1084 if (HASH_FLAGS_CPU & hdev->flags) { in stm32_hash_irq_thread()
1085 if (HASH_FLAGS_OUTPUT_READY & hdev->flags) { in stm32_hash_irq_thread()
1086 hdev->flags &= ~HASH_FLAGS_OUTPUT_READY; in stm32_hash_irq_thread()
1089 } else if (HASH_FLAGS_DMA_READY & hdev->flags) { in stm32_hash_irq_thread()
1090 if (HASH_FLAGS_DMA_ACTIVE & hdev->flags) { in stm32_hash_irq_thread()
1091 hdev->flags &= ~HASH_FLAGS_DMA_ACTIVE; in stm32_hash_irq_thread()
1100 stm32_hash_finish_req(hdev->req, 0); in stm32_hash_irq_thread()
1114 hdev->flags |= HASH_FLAGS_OUTPUT_READY; in stm32_hash_irq_handler()
1137 .cra_driver_name = "stm32-md5",
1163 .cra_driver_name = "stm32-hmac-md5",
1188 .cra_driver_name = "stm32-sha1",
1214 .cra_driver_name = "stm32-hmac-sha1",
1242 .cra_driver_name = "stm32-sha224",
1268 .cra_driver_name = "stm32-hmac-sha224",
1293 .cra_driver_name = "stm32-sha256",
1319 .cra_driver_name = "stm32-hmac-sha256",
1338 for (i = 0; i < hdev->pdata->algs_info_size; i++) { in stm32_hash_register_algs()
1339 for (j = 0; j < hdev->pdata->algs_info[i].size; j++) { in stm32_hash_register_algs()
1341 &hdev->pdata->algs_info[i].algs_list[j]); in stm32_hash_register_algs()
1349 dev_err(hdev->dev, "Algo %d : %d failed\n", i, j); in stm32_hash_register_algs()
1350 for (; i--; ) { in stm32_hash_register_algs()
1351 for (; j--;) in stm32_hash_register_algs()
1353 &hdev->pdata->algs_info[i].algs_list[j]); in stm32_hash_register_algs()
1363 for (i = 0; i < hdev->pdata->algs_info_size; i++) { in stm32_hash_unregister_algs()
1364 for (j = 0; j < hdev->pdata->algs_info[i].size; j++) in stm32_hash_unregister_algs()
1366 &hdev->pdata->algs_info[i].algs_list[j]); in stm32_hash_unregister_algs()
1402 .compatible = "st,stm32f456-hash",
1406 .compatible = "st,stm32f756-hash",
1417 hdev->pdata = of_device_get_match_data(dev); in stm32_hash_get_of_match()
1418 if (!hdev->pdata) { in stm32_hash_get_of_match()
1420 return -EINVAL; in stm32_hash_get_of_match()
1423 if (of_property_read_u32(dev->of_node, "dma-maxburst", in stm32_hash_get_of_match()
1424 &hdev->dma_maxburst)) { in stm32_hash_get_of_match()
1425 dev_info(dev, "dma-maxburst not specified, using 0\n"); in stm32_hash_get_of_match()
1426 hdev->dma_maxburst = 0; in stm32_hash_get_of_match()
1435 struct device *dev = &pdev->dev; in stm32_hash_probe()
1441 return -ENOMEM; in stm32_hash_probe()
1444 hdev->io_base = devm_ioremap_resource(dev, res); in stm32_hash_probe()
1445 if (IS_ERR(hdev->io_base)) in stm32_hash_probe()
1446 return PTR_ERR(hdev->io_base); in stm32_hash_probe()
1448 hdev->phys_base = res->start; in stm32_hash_probe()
1466 hdev->clk = devm_clk_get(&pdev->dev, NULL); in stm32_hash_probe()
1467 if (IS_ERR(hdev->clk)) in stm32_hash_probe()
1468 return dev_err_probe(dev, PTR_ERR(hdev->clk), in stm32_hash_probe()
1469 "failed to get clock for hash\n"); in stm32_hash_probe()
1471 ret = clk_prepare_enable(hdev->clk); in stm32_hash_probe()
1473 dev_err(dev, "failed to enable hash clock (%d)\n", ret); in stm32_hash_probe()
1484 hdev->rst = devm_reset_control_get(&pdev->dev, NULL); in stm32_hash_probe()
1485 if (IS_ERR(hdev->rst)) { in stm32_hash_probe()
1486 if (PTR_ERR(hdev->rst) == -EPROBE_DEFER) { in stm32_hash_probe()
1487 ret = -EPROBE_DEFER; in stm32_hash_probe()
1491 reset_control_assert(hdev->rst); in stm32_hash_probe()
1493 reset_control_deassert(hdev->rst); in stm32_hash_probe()
1496 hdev->dev = dev; in stm32_hash_probe()
1504 case -ENOENT: in stm32_hash_probe()
1512 list_add_tail(&hdev->list, &stm32_hash.dev_list); in stm32_hash_probe()
1516 hdev->engine = crypto_engine_alloc_init(dev, 1); in stm32_hash_probe()
1517 if (!hdev->engine) { in stm32_hash_probe()
1518 ret = -ENOMEM; in stm32_hash_probe()
1522 ret = crypto_engine_start(hdev->engine); in stm32_hash_probe()
1526 hdev->dma_mode = stm32_hash_read(hdev, HASH_HWCFGR); in stm32_hash_probe()
1533 dev_info(dev, "Init HASH done HW ver %x DMA mode %u\n", in stm32_hash_probe()
1534 stm32_hash_read(hdev, HASH_VER), hdev->dma_mode); in stm32_hash_probe()
1542 crypto_engine_exit(hdev->engine); in stm32_hash_probe()
1545 list_del(&hdev->list); in stm32_hash_probe()
1548 if (hdev->dma_lch) in stm32_hash_probe()
1549 dma_release_channel(hdev->dma_lch); in stm32_hash_probe()
1554 clk_disable_unprepare(hdev->clk); in stm32_hash_probe()
1566 return -ENODEV; in stm32_hash_remove()
1568 ret = pm_runtime_get_sync(hdev->dev); in stm32_hash_remove()
1574 crypto_engine_exit(hdev->engine); in stm32_hash_remove()
1577 list_del(&hdev->list); in stm32_hash_remove()
1580 if (hdev->dma_lch) in stm32_hash_remove()
1581 dma_release_channel(hdev->dma_lch); in stm32_hash_remove()
1583 pm_runtime_disable(hdev->dev); in stm32_hash_remove()
1584 pm_runtime_put_noidle(hdev->dev); in stm32_hash_remove()
1586 clk_disable_unprepare(hdev->clk); in stm32_hash_remove()
1596 clk_disable_unprepare(hdev->clk); in stm32_hash_runtime_suspend()
1606 ret = clk_prepare_enable(hdev->clk); in stm32_hash_runtime_resume()
1608 dev_err(hdev->dev, "Failed to prepare_enable clock\n"); in stm32_hash_runtime_resume()
1627 .name = "stm32-hash",