Lines Matching +full:half +full:- +full:bit

1 /* SPDX-License-Identifier: (BSD-3-Clause OR GPL-2.0-only) */
2 /* Copyright(c) 2015 - 2020 Intel Corporation */
7  * PF<->VF Messaging
8  * The PF has an array of 32-bit PF2VF registers, one for each VF.  The
13  * The bottom half is for PF->VF messages. In particular when the first
14  * bit of this register (bit 0) gets set an interrupt will be triggered
16  * The top half is for VF->PF messages. In particular when the first bit
17  * of this half of register (bit 16) gets set an interrupt will be triggered
27  * +-----------------------------------------------+
33  *                Message-specific Data/Reserved
38  * +-----------------------------------------------+
44  *                Message-specific Data/Reserved
47  * A legacy out-of-tree QAT driver allowed for a set of messages not supported
55 #define ADF_PFVF_COMPATIBILITY_VERSION		0x1	/* PF<->VF compat */
57 /* PF->VF messages */
58 #define ADF_PF2VF_INT				BIT(0)
59 #define ADF_PF2VF_MSGORIGIN_SYSTEM		BIT(1)
67 /* PF->VF Version Response */
78 /* VF->PF messages */
81 #define ADF_VF2PF_INT				BIT(16)
82 #define ADF_VF2PF_MSGORIGIN_SYSTEM		BIT(17)
90 /* VF->PF Compatible Version Request */