Lines Matching full:ss
3 * sun4i-ss-core.c - hardware cryptographic accelerator for Allwinner A20 SoC
7 * Core file which registers crypto algorithms supported by the SS.
24 #include "sun4i-ss.h"
50 .cra_driver_name = "md5-sun4i-ss",
77 .cra_driver_name = "sha1-sun4i-ss",
99 .cra_driver_name = "cbc-aes-sun4i-ss",
120 .cra_driver_name = "ecb-aes-sun4i-ss",
142 .cra_driver_name = "cbc-des-sun4i-ss",
163 .cra_driver_name = "ecb-des-sun4i-ss",
185 .cra_driver_name = "cbc-des3-sun4i-ss",
206 .cra_driver_name = "ecb-des3-sun4i-ss",
243 struct sun4i_ss_ctx *ss = dev_get_drvdata(dev); in sun4i_ss_pm_suspend() local
245 if (ss->reset) in sun4i_ss_pm_suspend()
246 reset_control_assert(ss->reset); in sun4i_ss_pm_suspend()
248 clk_disable_unprepare(ss->ssclk); in sun4i_ss_pm_suspend()
249 clk_disable_unprepare(ss->busclk); in sun4i_ss_pm_suspend()
255 struct sun4i_ss_ctx *ss = dev_get_drvdata(dev); in sun4i_ss_pm_resume() local
259 err = clk_prepare_enable(ss->busclk); in sun4i_ss_pm_resume()
261 dev_err(ss->dev, "Cannot prepare_enable busclk\n"); in sun4i_ss_pm_resume()
265 err = clk_prepare_enable(ss->ssclk); in sun4i_ss_pm_resume()
267 dev_err(ss->dev, "Cannot prepare_enable ssclk\n"); in sun4i_ss_pm_resume()
271 if (ss->reset) { in sun4i_ss_pm_resume()
272 err = reset_control_deassert(ss->reset); in sun4i_ss_pm_resume()
274 dev_err(ss->dev, "Cannot deassert reset control\n"); in sun4i_ss_pm_resume()
294 static int sun4i_ss_pm_init(struct sun4i_ss_ctx *ss) in sun4i_ss_pm_init() argument
298 pm_runtime_use_autosuspend(ss->dev); in sun4i_ss_pm_init()
299 pm_runtime_set_autosuspend_delay(ss->dev, 2000); in sun4i_ss_pm_init()
301 err = pm_runtime_set_suspended(ss->dev); in sun4i_ss_pm_init()
304 pm_runtime_enable(ss->dev); in sun4i_ss_pm_init()
308 static void sun4i_ss_pm_exit(struct sun4i_ss_ctx *ss) in sun4i_ss_pm_exit() argument
310 pm_runtime_disable(ss->dev); in sun4i_ss_pm_exit()
320 struct sun4i_ss_ctx *ss; in sun4i_ss_probe() local
325 ss = devm_kzalloc(&pdev->dev, sizeof(*ss), GFP_KERNEL); in sun4i_ss_probe()
326 if (!ss) in sun4i_ss_probe()
329 ss->base = devm_platform_ioremap_resource(pdev, 0); in sun4i_ss_probe()
330 if (IS_ERR(ss->base)) { in sun4i_ss_probe()
332 return PTR_ERR(ss->base); in sun4i_ss_probe()
335 ss->variant = of_device_get_match_data(&pdev->dev); in sun4i_ss_probe()
336 if (!ss->variant) { in sun4i_ss_probe()
341 ss->ssclk = devm_clk_get(&pdev->dev, "mod"); in sun4i_ss_probe()
342 if (IS_ERR(ss->ssclk)) { in sun4i_ss_probe()
343 err = PTR_ERR(ss->ssclk); in sun4i_ss_probe()
344 dev_err(&pdev->dev, "Cannot get SS clock err=%d\n", err); in sun4i_ss_probe()
347 dev_dbg(&pdev->dev, "clock ss acquired\n"); in sun4i_ss_probe()
349 ss->busclk = devm_clk_get(&pdev->dev, "ahb"); in sun4i_ss_probe()
350 if (IS_ERR(ss->busclk)) { in sun4i_ss_probe()
351 err = PTR_ERR(ss->busclk); in sun4i_ss_probe()
352 dev_err(&pdev->dev, "Cannot get AHB SS clock err=%d\n", err); in sun4i_ss_probe()
357 ss->reset = devm_reset_control_get_optional(&pdev->dev, "ahb"); in sun4i_ss_probe()
358 if (IS_ERR(ss->reset)) { in sun4i_ss_probe()
359 if (PTR_ERR(ss->reset) == -EPROBE_DEFER) in sun4i_ss_probe()
360 return PTR_ERR(ss->reset); in sun4i_ss_probe()
362 ss->reset = NULL; in sun4i_ss_probe()
369 err = clk_set_rate(ss->ssclk, cr_mod); in sun4i_ss_probe()
380 cr = clk_get_rate(ss->busclk); in sun4i_ss_probe()
388 cr = clk_get_rate(ss->ssclk); in sun4i_ss_probe()
391 dev_warn(&pdev->dev, "Clock ss %lu (%lu MHz) (must be <= %lu)\n", in sun4i_ss_probe()
394 dev_dbg(&pdev->dev, "Clock ss %lu (%lu MHz) (must be <= %lu)\n", in sun4i_ss_probe()
397 dev_warn(&pdev->dev, "Clock ss is at %lu (%lu MHz) (must be <= %lu)\n", in sun4i_ss_probe()
400 ss->dev = &pdev->dev; in sun4i_ss_probe()
401 platform_set_drvdata(pdev, ss); in sun4i_ss_probe()
403 spin_lock_init(&ss->slock); in sun4i_ss_probe()
405 err = sun4i_ss_pm_init(ss); in sun4i_ss_probe()
412 * Since the A80 seems to have an other version of SS in sun4i_ss_probe()
416 err = pm_runtime_get_sync(ss->dev); in sun4i_ss_probe()
420 writel(SS_ENABLED, ss->base + SS_CTL); in sun4i_ss_probe()
421 v = readl(ss->base + SS_CTL); in sun4i_ss_probe()
425 writel(0, ss->base + SS_CTL); in sun4i_ss_probe()
427 pm_runtime_put_sync(ss->dev); in sun4i_ss_probe()
430 ss_algs[i].ss = ss; in sun4i_ss_probe()
435 dev_err(ss->dev, "Fail to register %s\n", in sun4i_ss_probe()
443 dev_err(ss->dev, "Fail to register %s\n", in sun4i_ss_probe()
451 dev_err(ss->dev, "Fail to register %s\n", in sun4i_ss_probe()
474 sun4i_ss_pm_exit(ss); in sun4i_ss_probe()
481 struct sun4i_ss_ctx *ss = platform_get_drvdata(pdev); in sun4i_ss_remove() local
497 sun4i_ss_pm_exit(ss); in sun4i_ss_remove()
516 .name = "sun4i-ss",
524 MODULE_ALIAS("platform:sun4i-ss");