Lines Matching +full:use +full:- +full:minimum +full:- +full:ecc
1 # SPDX-License-Identifier: GPL-2.0-only
34 Use VIA PadLock for AES algorithm.
39 called padlock-aes.
48 Use VIA PadLock for SHA1/SHA256 algorithms.
53 called padlock-sha.
61 Say 'Y' here to use the AMD Geode LX processor on-board AES
65 will be called geode-aes.
104 down the use of the available crypto hardware.
113 kernel or userspace applications may use these functions.
131 AES cipher algorithms for use with protected key.
133 Select this option if you want to use the paes cipher
134 for example to use protected key encrypted devices.
142 SHA-1 secure hash standard (FIPS 180-1/DFIPS 180-2).
152 SHA256 secure hash standard (DFIPS 180-2).
194 DES cipher algorithm (FIPS 46-2), and Triple DES EDE (FIPS 46-3).
206 AES cipher algorithms (FIPS-197).
221 Select this option if you want to use the s390 pseudo random number
223 and uses triple-DES to generate secure random numbers like the
224 ANSI X9.17 standard. User-space programs access the
225 pseudo-random-number device through the char device /dev/prandom.
240 tristate "CRC-32 algorithms"
245 Select this option if you want to use hardware accelerated
247 can optimize the computation of CRC-32 (IEEE 802.3 Ethernet)
248 and CRC-32C (Castagnoli).
264 sub-units. One set provides the Modular Arithmetic Unit,
298 Say 'Y' here to use the Freescale Security Engine (SEC)
313 Say 'Y' here to use the Freescale Security Engine (SEC) version 1.0
322 Say 'Y' here to use the Freescale Security Engine (SEC)
354 This option provides the kernel-side support for the TRNG hardware
362 you want to use the OMAP modules for any of the crypto algorithms.
376 want to use the OMAP module for MD5/SHA1/SHA2 algorithms.
390 want to use the OMAP module for AES algorithms.
400 want to use the OMAP module for DES and 3DES algorithms. Currently
440 This driver provides kernel-side support through the
445 module will be called exynos-rng.
470 needed for small and zero-size messages.
488 tristate "Driver for ST-Ericsson UX500 crypto hardware acceleration"
491 Driver for ST-Ericsson UX500 crypto engine.
504 Select this if you want to use the Atmel modules for
517 Select this if you want to use the Atmel module for
521 will be called atmel-aes.
530 Select this if you want to use the Atmel module for
534 will be called atmel-tdes.
543 Select this if you want to use the Atmel module for
547 will be called atmel-sha.
553 tristate "Support for Microchip / Atmel ECC hw accelerator"
559 Microhip / Atmel ECC hw accelerator.
560 Select this if you want to use the Microchip / Atmel module for
564 will be called atmel-ecc.
574 Select this if you want to use the Microchip / Atmel SHA204A
579 will be called atmel-sha204a.
603 co-processor on the die.
606 will be called mxs-dcp.
652 (default), hashes-only, or skciphers-only.
655 multiple crypto requests. While the ipq40xx chips have 4-core CPUs, the
659 algorithms, sharing the load with the CPU. Enabling skciphers-only
668 - AES (CBC, CTR, ECB, XTS)
669 - 3DES (CBC, ECB)
670 - DES (CBC, ECB)
671 - SHA1, HMAC-SHA1
672 - SHA256, HMAC-SHA256
675 bool "Symmetric-key ciphers only"
678 Enable symmetric-key ciphers only:
679 - AES (CBC, CTR, ECB, XTS)
680 - 3DES (ECB, CBC)
681 - DES (ECB, CBC)
688 - SHA1, HMAC-SHA1
689 - SHA256, HMAC-SHA256
694 int "Default maximum request size to use software for AES"
703 Considering the 256-bit ciphers, software is 2-3 times faster than
704 qce at 256-bytes, 30% faster at 512, and about even at 768-bytes.
705 With 128-bit keys, the break-even point would be around 1024-bytes.
708 cost in CPU usage. The minimum recommended setting is 16-bytes
709 (1 AES block), since AES-GCM will fail if you set it lower.
712 Note that 192-bit keys are not supported by the hardware and are
725 module will be called qcom-rng. If unsure, say N.
769 Xilinx ZynqMP has AES-GCM engine used for symmetric key
771 accelerator. Select this if you want to use the ZynqMP module
787 Select this if you want to use it for AES/SHA1/SHA2 algorithms.
827 This driver interfaces with the SafeXcel EIP-97 and EIP-197 cryptographic
831 Additionally, it accelerates combined AES-CBC/HMAC-SHA AEAD operations.
834 tristate "Support for Axis ARTPEC-6/7 hardware crypto acceleration."
847 Enables the driver for the on-chip crypto accelerator
877 Choose this if you wish to use hardware acceleration of
900 used for crypto offload. Select this if you want to use hardware