1 // SPDX-License-Identifier: GPL-2.0-only
5  * Copyright (c) 2010-2013, NVIDIA Corporation.
15 #define pr_fmt(fmt)	"tegra-cpuidle: " fmt
53 	return firmware_ops->prepare_idle && firmware_ops->do_idle;  in tegra_cpuidle_using_firmware()
73 	while (retries--) {  in tegra_cpuidle_wait_for_secondary_cpus_parking()
79 		 * shutdown in order to power-off CPU's cluster safely.  in tegra_cpuidle_wait_for_secondary_cpus_parking()
81 		 * it takes about 40-150us in average and over 1000us in  in tegra_cpuidle_wait_for_secondary_cpus_parking()
90 		} while (timeout_us--);  in tegra_cpuidle_wait_for_secondary_cpus_parking()
99 	return -ETIMEDOUT;  in tegra_cpuidle_wait_for_secondary_cpus_parking()
166 		return -EINTR;  in tegra_cpuidle_coupled_barrier()
178 	 * CC6 state is the "CPU cluster power-off" state.  In order to  in tegra_cpuidle_state_enter()
182 	 * logic that turns off the cluster's power domain (which includes  in tegra_cpuidle_state_enter()
205 		err = -EINVAL;  in tegra_cpuidle_state_enter()
219 	 * On Tegra30 CPU0 can't be power-gated separately from secondary  in tegra_cpuidle_adjust_state_index()
238 	unsigned int cpu = cpu_logical_map(dev->cpu);  in tegra_cpuidle_enter()
242 	if (dev->states_usage[index].disable)  in tegra_cpuidle_enter()
243 		return -1;  in tegra_cpuidle_enter()
251 		if (ret != -EINTR || index != TEGRA_CC6)  in tegra_cpuidle_enter()
254 		index = -1;  in tegra_cpuidle_enter()
279  * ---------
299 			.desc			= "CPU core powered off",
309 			.desc			= "CPU cluster powered off",
330 	if ((state_cc6->flags & CPUIDLE_FLAG_UNUSABLE) ||  in tegra_cpuidle_pcie_irqs_in_use()
342 	s->enter_s2idle = tegra114_enter_s2idle;  in tegra_cpuidle_setup_tegra114_c7_state()
343 	s->target_residency = 1000;  in tegra_cpuidle_setup_tegra114_c7_state()
344 	s->exit_latency = 500;  in tegra_cpuidle_setup_tegra114_c7_state()
349 	/* LP2 could be disabled in device-tree */  in tegra_cpuidle_probe()
354 	 * Required suspend-resume functionality, which is provided by the  in tegra_cpuidle_probe()
355 	 * Tegra-arch core and PMC driver, is unavailable if PM-sleep option  in tegra_cpuidle_probe()
367 	 * cluster power-off (CC6 or LP2) states are common for all Tegra SoCs.  in tegra_cpuidle_probe()
371 		/* Tegra20 isn't capable to power-off individual CPU cores */  in tegra_cpuidle_probe()
387 		return -EINVAL;  in tegra_cpuidle_probe()
396 		.name = "tegra-cpuidle",