Lines Matching +full:clock +full:- +full:freq
1 // SPDX-License-Identifier: GPL-2.0-only
3 * Copyright (c) 2006-2008 Simtec Electronics
24 #include <linux/soc/samsung/s3c-cpufreq-core.h>
25 #include <linux/soc/samsung/s3c-pm.h>
62 cfg->freq.fclk = fclk = clk_get_rate(clk_fclk); in s3c_cpufreq_getcur()
63 cfg->freq.hclk = hclk = clk_get_rate(clk_hclk); in s3c_cpufreq_getcur()
64 cfg->freq.pclk = pclk = clk_get_rate(clk_pclk); in s3c_cpufreq_getcur()
65 cfg->freq.armclk = armclk = clk_get_rate(clk_arm); in s3c_cpufreq_getcur()
67 cfg->pll.driver_data = s3c24xx_read_mpllcon(); in s3c_cpufreq_getcur()
68 cfg->pll.frequency = fclk; in s3c_cpufreq_getcur()
70 cfg->freq.hclk_tns = 1000000000 / (cfg->freq.hclk / 10); in s3c_cpufreq_getcur()
72 cfg->divs.h_divisor = fclk / hclk; in s3c_cpufreq_getcur()
73 cfg->divs.p_divisor = fclk / pclk; in s3c_cpufreq_getcur()
78 unsigned long pll = cfg->pll.frequency; in s3c_cpufreq_calc()
80 cfg->freq.fclk = pll; in s3c_cpufreq_calc()
81 cfg->freq.hclk = pll / cfg->divs.h_divisor; in s3c_cpufreq_calc()
82 cfg->freq.pclk = pll / cfg->divs.p_divisor; in s3c_cpufreq_calc()
85 cfg->freq.hclk_tns = 1000000000 / (cfg->freq.hclk / 10); in s3c_cpufreq_calc()
90 int diff_cur = abs(target - c); in closer()
91 int diff_new = abs(target - n); in closer()
100 pfx, cfg->pll.frequency, cfg->freq.fclk, cfg->freq.armclk, in s3c_cpufreq_show()
101 cfg->freq.hclk, cfg->divs.h_divisor, in s3c_cpufreq_show()
102 cfg->freq.pclk, cfg->divs.p_divisor); in s3c_cpufreq_show()
109 if (cfg->info->set_iotiming) in s3c_cpufreq_setio()
110 (cfg->info->set_iotiming)(cfg, &s3c24xx_iotiming); in s3c_cpufreq_setio()
115 if (cfg->info->calc_iotiming) in s3c_cpufreq_calcio()
116 return (cfg->info->calc_iotiming)(cfg, &s3c24xx_iotiming); in s3c_cpufreq_calcio()
123 (cfg->info->set_refresh)(cfg); in s3c_cpufreq_setrefresh()
128 (cfg->info->set_divs)(cfg); in s3c_cpufreq_setdivs()
133 return (cfg->info->calc_divs)(cfg); in s3c_cpufreq_calcdivs()
138 cfg->mpll = _clk_mpll; in s3c_cpufreq_setfvco()
139 (cfg->info->set_fvco)(cfg); in s3c_cpufreq_setfvco()
143 unsigned int freq) in s3c_cpufreq_updateclk() argument
145 clk_set_rate(clk, freq); in s3c_cpufreq_updateclk()
160 /* TODO - check for DMA currently outstanding */ in s3c_cpufreq_settarget()
169 cpu_new.freq.armclk = target_freq; in s3c_cpufreq_settarget()
170 cpu_new.freq.fclk = cpu_new.pll.frequency; in s3c_cpufreq_settarget()
183 if (cpu_new.freq.hclk != cpu_cur.freq.hclk) { in s3c_cpufreq_settarget()
194 freqs.old = cpu_cur.freq; in s3c_cpufreq_settarget()
195 freqs.new = cpu_new.freq; in s3c_cpufreq_settarget()
197 freqs.freqs.old = cpu_cur.freq.armclk / 1000; in s3c_cpufreq_settarget()
198 freqs.freqs.new = cpu_new.freq.armclk / 1000; in s3c_cpufreq_settarget()
200 /* update f/h/p clock settings before we issue the change in s3c_cpufreq_settarget()
205 s3c_cpufreq_updateclk(clk_fclk, cpu_new.freq.fclk); in s3c_cpufreq_settarget()
206 s3c_cpufreq_updateclk(clk_hclk, cpu_new.freq.hclk); in s3c_cpufreq_settarget()
207 s3c_cpufreq_updateclk(clk_pclk, cpu_new.freq.pclk); in s3c_cpufreq_settarget()
213 * re-write the IO or the refresh timings whilst we are changing in s3c_cpufreq_settarget()
218 /* is our memory clock slowing down? */ in s3c_cpufreq_settarget()
219 if (cpu_new.freq.hclk < cpu_cur.freq.hclk) { in s3c_cpufreq_settarget()
224 if (cpu_new.freq.fclk == cpu_cur.freq.fclk) { in s3c_cpufreq_settarget()
229 if (cpu_new.freq.fclk < cpu_cur.freq.fclk) { in s3c_cpufreq_settarget()
242 /* did our memory clock speed up */ in s3c_cpufreq_settarget()
243 if (cpu_new.freq.hclk > cpu_cur.freq.hclk) { in s3c_cpufreq_settarget()
261 return -EINVAL; in s3c_cpufreq_settarget()
311 tmp_policy.min = policy->min * 1000; in s3c_cpufreq_target()
312 tmp_policy.max = policy->max * 1000; in s3c_cpufreq_target()
313 tmp_policy.cpu = policy->cpu; in s3c_cpufreq_target()
325 __func__, target_freq, pll->frequency); in s3c_cpufreq_target()
327 target_freq = pll->frequency; in s3c_cpufreq_target()
339 pr_err("failed to get clock '%s'\n", name); in s3c_cpufreq_clk_get()
346 policy->clk = clk_arm; in s3c_cpufreq_init()
347 policy->cpuinfo.transition_latency = cpu_cur.info->latency; in s3c_cpufreq_init()
348 policy->freq_table = ftab; in s3c_cpufreq_init()
364 pr_err("%s: could not get clock(s)\n", __func__); in s3c_cpufreq_initclks()
365 return -ENOENT; in s3c_cpufreq_initclks()
399 /* whilst we will be called later on, we try and re-set the in s3c_cpufreq_resume()
401 * up resuming devices and then immediately having to re-set in s3c_cpufreq_resume()
405 * have been un-suspended and at that time they should have in s3c_cpufreq_resume()
406 * used the updated clock settings. in s3c_cpufreq_resume()
411 pr_err("%s: failed to reset pll/freq\n", __func__); in s3c_cpufreq_resume()
435 if (!info || !info->name) { in s3c_cpufreq_register()
437 return -EINVAL; in s3c_cpufreq_register()
441 info->name); in s3c_cpufreq_register()
445 BUG_ON(info->set_refresh == NULL); in s3c_cpufreq_register()
446 BUG_ON(info->set_divs == NULL); in s3c_cpufreq_register()
447 BUG_ON(info->calc_divs == NULL); in s3c_cpufreq_register()
449 /* info->set_fvco is optional, depending on whether there in s3c_cpufreq_register()
450 * is a need to set the clock code. */ in s3c_cpufreq_register()
465 return -EINVAL; in s3c_cpufreq_setboard()
473 return -ENOMEM; in s3c_cpufreq_setboard()
485 if (!cpu_cur.info->get_iotiming) { in s3c_cpufreq_auto_io()
487 return -ENOENT; in s3c_cpufreq_auto_io()
492 ret = (cpu_cur.info->get_iotiming)(&cpu_cur, &s3c24xx_iotiming); in s3c_cpufreq_auto_io()
503 * s3c_cpufreq_freq_min - find the minimum settings for the given freq.
509 * unless the entry is zero when it is ignored and the non-zero argument
515 dst->fclk = do_min(a->fclk, b->fclk); in s3c_cpufreq_freq_min()
516 dst->hclk = do_min(a->hclk, b->hclk); in s3c_cpufreq_freq_min()
517 dst->pclk = do_min(a->pclk, b->pclk); in s3c_cpufreq_freq_min()
518 dst->armclk = do_min(a->armclk, b->armclk); in s3c_cpufreq_freq_min()
521 static inline u32 calc_locktime(u32 freq, u32 time_us) in calc_locktime() argument
525 result = freq * time_us; in calc_locktime()
533 unsigned int bits = cpu_cur.info->locktime_bits; in s3c_cpufreq_update_loctkime()
542 val = calc_locktime(rate, cpu_cur.info->locktime_u) << bits; in s3c_cpufreq_update_loctkime()
543 val |= calc_locktime(rate, cpu_cur.info->locktime_m); in s3c_cpufreq_update_loctkime()
555 size = cpu_cur.info->calc_freqtable(&cpu_cur, NULL, 0); in s3c_cpufreq_build_freq()
560 return -ENOMEM; in s3c_cpufreq_build_freq()
564 ret = cpu_cur.info->calc_freqtable(&cpu_cur, ftab, size); in s3c_cpufreq_build_freq()
583 if (cpu_cur.board->auto_io) { in s3c_cpufreq_initcall()
592 if (cpu_cur.board->need_io && !cpu_cur.info->set_iotiming) { in s3c_cpufreq_initcall()
594 ret = -EINVAL; in s3c_cpufreq_initcall()
598 if (!cpu_cur.info->need_pll) in s3c_cpufreq_initcall()
603 s3c_cpufreq_freq_min(&cpu_cur.max, &cpu_cur.board->max, in s3c_cpufreq_initcall()
604 &cpu_cur.info->max); in s3c_cpufreq_initcall()
606 if (cpu_cur.info->calc_freqtable) in s3c_cpufreq_initcall()
619 * s3c_plltab_register - register CPU PLL table.
641 vals->frequency = CPUFREQ_TABLE_END; in s3c_plltab_register()
647 return vals ? 0 : -ENOMEM; in s3c_plltab_register()