Lines Matching +full:reboot +full:- +full:mode
1 // SPDX-License-Identifier: GPL-2.0-only
19 #include <linux/reboot.h>
47 /* pseudo-frequency for dvs mode */
50 /* frequency to sleep and reboot in
52 * regulator on reboot
61 /* S3C2416 only supports changing the voltage in the dvs-mode.
94 /* return our pseudo-frequency when in dvs mode */ in s3c2416_cpufreq_get_speed()
95 if (s3c_freq->is_dvs) in s3c2416_cpufreq_get_speed()
98 return clk_get_rate(s3c_freq->armclk) / 1000; in s3c2416_cpufreq_get_speed()
106 if (clk_get_rate(s3c_freq->armdiv) / 1000 != freq) { in s3c2416_cpufreq_set_armdiv()
107 ret = clk_set_rate(s3c_freq->armdiv, freq * 1000); in s3c2416_cpufreq_set_armdiv()
125 if (s3c_freq->is_dvs) { in s3c2416_cpufreq_enter_dvs()
126 pr_debug("cpufreq: already in dvs mode, nothing to do\n"); in s3c2416_cpufreq_enter_dvs()
131 clk_get_rate(s3c_freq->hclk) / 1000); in s3c2416_cpufreq_enter_dvs()
132 ret = clk_set_parent(s3c_freq->armclk, s3c_freq->hclk); in s3c2416_cpufreq_enter_dvs()
139 /* changing the core voltage is only allowed when in dvs mode */ in s3c2416_cpufreq_enter_dvs()
140 if (s3c_freq->vddarm) { in s3c2416_cpufreq_enter_dvs()
143 pr_debug("cpufreq: setting regulator to %d-%d\n", in s3c2416_cpufreq_enter_dvs()
144 dvfs->vddarm_min, dvfs->vddarm_max); in s3c2416_cpufreq_enter_dvs()
145 ret = regulator_set_voltage(s3c_freq->vddarm, in s3c2416_cpufreq_enter_dvs()
146 dvfs->vddarm_min, in s3c2416_cpufreq_enter_dvs()
147 dvfs->vddarm_max); in s3c2416_cpufreq_enter_dvs()
155 s3c_freq->is_dvs = 1; in s3c2416_cpufreq_enter_dvs()
167 if (!s3c_freq->is_dvs) { in s3c2416_cpufreq_leave_dvs()
168 pr_debug("cpufreq: not in dvs mode, so can't leave\n"); in s3c2416_cpufreq_leave_dvs()
173 if (s3c_freq->vddarm) { in s3c2416_cpufreq_leave_dvs()
176 pr_debug("cpufreq: setting regulator to %d-%d\n", in s3c2416_cpufreq_leave_dvs()
177 dvfs->vddarm_min, dvfs->vddarm_max); in s3c2416_cpufreq_leave_dvs()
178 ret = regulator_set_voltage(s3c_freq->vddarm, in s3c2416_cpufreq_leave_dvs()
179 dvfs->vddarm_min, in s3c2416_cpufreq_leave_dvs()
180 dvfs->vddarm_max); in s3c2416_cpufreq_leave_dvs()
189 if (clk_get_rate(s3c_freq->armdiv) > clk_get_rate(s3c_freq->hclk)) { in s3c2416_cpufreq_leave_dvs()
191 clk_get_rate(s3c_freq->hclk) / 1000); in s3c2416_cpufreq_leave_dvs()
193 clk_get_rate(s3c_freq->hclk) / 1000); in s3c2416_cpufreq_leave_dvs()
196 clk_get_rate(s3c_freq->hclk) / 1000, ret); in s3c2416_cpufreq_leave_dvs()
202 clk_get_rate(s3c_freq->armdiv) / 1000); in s3c2416_cpufreq_leave_dvs()
204 ret = clk_set_parent(s3c_freq->armclk, s3c_freq->armdiv); in s3c2416_cpufreq_leave_dvs()
211 s3c_freq->is_dvs = 0; in s3c2416_cpufreq_leave_dvs()
225 idx = s3c_freq->freq_table[index].driver_data; in s3c2416_cpufreq_set_target()
231 if (to_dvs && s3c_freq->disable_dvs) { in s3c2416_cpufreq_set_target()
232 pr_debug("cpufreq: entering dvs mode not allowed\n"); in s3c2416_cpufreq_set_target()
233 ret = -EINVAL; in s3c2416_cpufreq_set_target()
237 /* When leavin dvs mode, always switch the armdiv to the hclk rate in s3c2416_cpufreq_set_target()
241 new_freq = (s3c_freq->is_dvs && !to_dvs) in s3c2416_cpufreq_set_target()
242 ? clk_get_rate(s3c_freq->hclk) / 1000 in s3c2416_cpufreq_set_target()
243 : s3c_freq->freq_table[index].frequency; in s3c2416_cpufreq_set_target()
248 } else if (s3c_freq->is_dvs) { in s3c2416_cpufreq_set_target()
269 count = regulator_count_voltages(s3c_freq->vddarm); in s3c2416_cpufreq_cfg_regulator()
278 cpufreq_for_each_valid_entry(pos, s3c_freq->freq_table) { in s3c2416_cpufreq_cfg_regulator()
279 dvfs = &s3c2416_dvfs_table[pos->driver_data]; in s3c2416_cpufreq_cfg_regulator()
282 /* Check only the min-voltage, more is always ok on S3C2416 */ in s3c2416_cpufreq_cfg_regulator()
284 v = regulator_list_voltage(s3c_freq->vddarm, i); in s3c2416_cpufreq_cfg_regulator()
285 if (v >= dvfs->vddarm_min) in s3c2416_cpufreq_cfg_regulator()
291 pos->frequency); in s3c2416_cpufreq_cfg_regulator()
292 pos->frequency = CPUFREQ_ENTRY_INVALID; in s3c2416_cpufreq_cfg_regulator()
298 s3c_freq->regulator_latency = 1 * 1000 * 1000; in s3c2416_cpufreq_cfg_regulator()
312 s3c_freq->disable_dvs = 1; in s3c2416_cpufreq_reboot_notifier_evt()
316 /* some boards don't reconfigure the regulator on reboot, which in s3c2416_cpufreq_reboot_notifier_evt()
318 * Therefore we always leave the DVS mode on reboot. in s3c2416_cpufreq_reboot_notifier_evt()
320 if (s3c_freq->is_dvs) { in s3c2416_cpufreq_reboot_notifier_evt()
321 pr_debug("cpufreq: leave dvs on reboot\n"); in s3c2416_cpufreq_reboot_notifier_evt()
351 if (policy->cpu != 0) in s3c2416_cpufreq_driver_init()
352 return -EINVAL; in s3c2416_cpufreq_driver_init()
362 * S3C2416 and S3C2450 share the same processor-ID and also provide no in s3c2416_cpufreq_driver_init()
370 s3c_freq->freq_table = s3c2416_freq_table; in s3c2416_cpufreq_driver_init()
371 policy->cpuinfo.max_freq = 400000; in s3c2416_cpufreq_driver_init()
375 s3c_freq->freq_table = s3c2450_freq_table; in s3c2416_cpufreq_driver_init()
376 policy->cpuinfo.max_freq = 534000; in s3c2416_cpufreq_driver_init()
382 if (s3c_freq->freq_table == NULL) { in s3c2416_cpufreq_driver_init()
385 return -ENODEV; in s3c2416_cpufreq_driver_init()
388 s3c_freq->is_dvs = 0; in s3c2416_cpufreq_driver_init()
390 s3c_freq->armdiv = clk_get(NULL, "armdiv"); in s3c2416_cpufreq_driver_init()
391 if (IS_ERR(s3c_freq->armdiv)) { in s3c2416_cpufreq_driver_init()
392 ret = PTR_ERR(s3c_freq->armdiv); in s3c2416_cpufreq_driver_init()
397 s3c_freq->hclk = clk_get(NULL, "hclk"); in s3c2416_cpufreq_driver_init()
398 if (IS_ERR(s3c_freq->hclk)) { in s3c2416_cpufreq_driver_init()
399 ret = PTR_ERR(s3c_freq->hclk); in s3c2416_cpufreq_driver_init()
407 rate = clk_get_rate(s3c_freq->hclk); in s3c2416_cpufreq_driver_init()
410 ret = -EINVAL; in s3c2416_cpufreq_driver_init()
414 s3c_freq->armclk = clk_get(NULL, "armclk"); in s3c2416_cpufreq_driver_init()
415 if (IS_ERR(s3c_freq->armclk)) { in s3c2416_cpufreq_driver_init()
416 ret = PTR_ERR(s3c_freq->armclk); in s3c2416_cpufreq_driver_init()
422 s3c_freq->vddarm = regulator_get(NULL, "vddarm"); in s3c2416_cpufreq_driver_init()
423 if (IS_ERR(s3c_freq->vddarm)) { in s3c2416_cpufreq_driver_init()
424 ret = PTR_ERR(s3c_freq->vddarm); in s3c2416_cpufreq_driver_init()
431 s3c_freq->regulator_latency = 0; in s3c2416_cpufreq_driver_init()
434 cpufreq_for_each_entry(pos, s3c_freq->freq_table) { in s3c2416_cpufreq_driver_init()
435 /* special handling for dvs mode */ in s3c2416_cpufreq_driver_init()
436 if (pos->driver_data == 0) { in s3c2416_cpufreq_driver_init()
437 if (!s3c_freq->hclk) { in s3c2416_cpufreq_driver_init()
438 pr_debug("cpufreq: %dkHz unsupported as it would need unavailable dvs mode\n", in s3c2416_cpufreq_driver_init()
439 pos->frequency); in s3c2416_cpufreq_driver_init()
440 pos->frequency = CPUFREQ_ENTRY_INVALID; in s3c2416_cpufreq_driver_init()
447 rate = clk_round_rate(s3c_freq->armdiv, in s3c2416_cpufreq_driver_init()
448 pos->frequency * 1000); in s3c2416_cpufreq_driver_init()
450 if (rate != pos->frequency) { in s3c2416_cpufreq_driver_init()
452 pos->frequency, rate); in s3c2416_cpufreq_driver_init()
453 pos->frequency = CPUFREQ_ENTRY_INVALID; in s3c2416_cpufreq_driver_init()
460 cpufreq_generic_init(policy, s3c_freq->freq_table, in s3c2416_cpufreq_driver_init()
461 (500 * 1000) + s3c_freq->regulator_latency); in s3c2416_cpufreq_driver_init()
468 clk_put(s3c_freq->armclk); in s3c2416_cpufreq_driver_init()
471 clk_put(s3c_freq->hclk); in s3c2416_cpufreq_driver_init()
473 clk_put(s3c_freq->armdiv); in s3c2416_cpufreq_driver_init()