1 // SPDX-License-Identifier: GPL-2.0-only
5  * Counter driver for Texas Instruments Enhanced Quadrature Encoder Pulse (eQEP)
17 /* 32-bit registers */
28 /* 16-bit registers */
69 /* EQEP Inputs */
98 	struct ti_eqep_cnt *priv = counter->priv;  in ti_eqep_count_read()
101 	regmap_read(priv->regmap32, QPOSCNT, &cnt);  in ti_eqep_count_read()
110 	struct ti_eqep_cnt *priv = counter->priv;  in ti_eqep_count_write()
113 	regmap_read(priv->regmap32, QPOSMAX, &max);  in ti_eqep_count_write()
115 		return -EINVAL;  in ti_eqep_count_write()
117 	return regmap_write(priv->regmap32, QPOSCNT, val);  in ti_eqep_count_write()
123 	struct ti_eqep_cnt *priv = counter->priv;  in ti_eqep_function_get()
126 	regmap_read(priv->regmap16, QDECCTL, &qdecctl);  in ti_eqep_function_get()
135 	struct ti_eqep_cnt *priv = counter->priv;  in ti_eqep_function_set()
137 	return regmap_write_bits(priv->regmap16, QDECCTL, QDECCTL_QSRC,  in ti_eqep_function_set()
145 	struct ti_eqep_cnt *priv = counter->priv;  in ti_eqep_action_get()
162 		/* In direction-count mode only rising edge of QEPA is counted  in ti_eqep_action_get()
165 		switch (synapse->signal->id) {  in ti_eqep_action_get()
176 		/* In up/down-count modes only QEPA is counted and QEPB is not  in ti_eqep_action_get()
179 		switch (synapse->signal->id) {  in ti_eqep_action_get()
181 			err = regmap_read(priv->regmap16, QDECCTL, &qdecctl);  in ti_eqep_action_get()
212 	struct ti_eqep_cnt *priv = counter->priv;  in ti_eqep_position_ceiling_read()
215 	regmap_read(priv->regmap32, QPOSMAX, &qposmax);  in ti_eqep_position_ceiling_read()
225 	struct ti_eqep_cnt *priv = counter->priv;  in ti_eqep_position_ceiling_write()
233 	regmap_write(priv->regmap32, QPOSMAX, res);  in ti_eqep_position_ceiling_write()
242 	struct ti_eqep_cnt *priv = counter->priv;  in ti_eqep_position_floor_read()
245 	regmap_read(priv->regmap32, QPOSINIT, &qposinit);  in ti_eqep_position_floor_read()
255 	struct ti_eqep_cnt *priv = counter->priv;  in ti_eqep_position_floor_write()
263 	regmap_write(priv->regmap32, QPOSINIT, res);  in ti_eqep_position_floor_write()
272 	struct ti_eqep_cnt *priv = counter->priv;  in ti_eqep_position_enable_read()
275 	regmap_read(priv->regmap16, QEPCTL, &qepctl);  in ti_eqep_position_enable_read()
285 	struct ti_eqep_cnt *priv = counter->priv;  in ti_eqep_position_enable_write()
293 	regmap_write_bits(priv->regmap16, QEPCTL, QEPCTL_PHEN, res ? -1 : 0);  in ti_eqep_position_enable_write()
367 	.name = "32-bit",
375 	.name = "16-bit",
384 	struct device *dev = &pdev->dev;  in ti_eqep_probe()
391 		return -ENOMEM;  in ti_eqep_probe()
397 	priv->regmap32 = devm_regmap_init_mmio(dev, base,  in ti_eqep_probe()
399 	if (IS_ERR(priv->regmap32))  in ti_eqep_probe()
400 		return PTR_ERR(priv->regmap32);  in ti_eqep_probe()
402 	priv->regmap16 = devm_regmap_init_mmio(dev, base + 0x24,  in ti_eqep_probe()
404 	if (IS_ERR(priv->regmap16))  in ti_eqep_probe()
405 		return PTR_ERR(priv->regmap16);  in ti_eqep_probe()
407 	priv->counter.name = dev_name(dev);  in ti_eqep_probe()
408 	priv->counter.parent = dev;  in ti_eqep_probe()
409 	priv->counter.ops = &ti_eqep_counter_ops;  in ti_eqep_probe()
410 	priv->counter.counts = ti_eqep_counts;  in ti_eqep_probe()
411 	priv->counter.num_counts = ARRAY_SIZE(ti_eqep_counts);  in ti_eqep_probe()
412 	priv->counter.signals = ti_eqep_signals;  in ti_eqep_probe()
413 	priv->counter.num_signals = ARRAY_SIZE(ti_eqep_signals);  in ti_eqep_probe()
414 	priv->counter.priv = priv;  in ti_eqep_probe()
426 	err = counter_register(&priv->counter);  in ti_eqep_probe()
439 	struct device *dev = &pdev->dev;  in ti_eqep_remove()
441 	counter_unregister(&priv->counter);  in ti_eqep_remove()
449 	{ .compatible = "ti,am3352-eqep", },
458 		.name = "ti-eqep-cnt",
465 MODULE_DESCRIPTION("TI eQEP counter driver");