6  * Maxime Ripard <maxime.ripard@free-electrons.com>
48 #define to_sun5i_timer(x) \  argument
49 	container_of(x, struct sun5i_timer, clk_rate_cb)
56 #define to_sun5i_timer_clksrc(x) \  argument
57 	container_of(x, struct sun5i_timer_clksrc, clksrc)
64 #define to_sun5i_timer_clkevt(x) \  argument
65 	container_of(x, struct sun5i_timer_clkevt, clkevt)
75 	u32 old = readl(ce->timer.base + TIMER_CNTVAL_LO_REG(1));  in sun5i_clkevt_sync()
77 	while ((old - readl(ce->timer.base + TIMER_CNTVAL_LO_REG(1))) < TIMER_SYNC_TICKS)  in sun5i_clkevt_sync()
83 	u32 val = readl(ce->timer.base + TIMER_CTL_REG(timer));  in sun5i_clkevt_time_stop()
84 	writel(val & ~TIMER_CTL_ENABLE, ce->timer.base + TIMER_CTL_REG(timer));  in sun5i_clkevt_time_stop()
91 	writel(delay, ce->timer.base + TIMER_INTVAL_LO_REG(timer));  in sun5i_clkevt_time_setup()
96 	u32 val = readl(ce->timer.base + TIMER_CTL_REG(timer));  in sun5i_clkevt_time_start()
104 	       ce->timer.base + TIMER_CTL_REG(timer));  in sun5i_clkevt_time_start()
129 	sun5i_clkevt_time_setup(ce, 0, ce->timer.ticks_per_jiffy);  in sun5i_clkevt_set_periodic()
140 	sun5i_clkevt_time_setup(ce, 0, evt - TIMER_SYNC_TICKS);  in sun5i_clkevt_next_event()
150 	writel(0x1, ce->timer.base + TIMER_IRQ_ST_REG);  in sun5i_timer_interrupt()
151 	ce->clkevt.event_handler(&ce->clkevt);  in sun5i_timer_interrupt()
158 	struct sun5i_timer_clksrc *cs = to_sun5i_timer_clksrc(clksrc);  in sun5i_clksrc_read()  local
160 	return ~readl(cs->timer.base + TIMER_CNTVAL_LO_REG(1));  in sun5i_clksrc_read()
168 	struct sun5i_timer_clksrc *cs = container_of(timer, struct sun5i_timer_clksrc, timer);  in sun5i_rate_cb_clksrc()  local
172 		clocksource_unregister(&cs->clksrc);  in sun5i_rate_cb_clksrc()
176 		clocksource_register_hz(&cs->clksrc, ndata->new_rate);  in sun5i_rate_cb_clksrc()
190 	struct sun5i_timer_clksrc *cs;  in sun5i_setup_clocksource()  local
194 	cs = kzalloc(sizeof(*cs), GFP_KERNEL);  in sun5i_setup_clocksource()
195 	if (!cs)  in sun5i_setup_clocksource()
196 		return -ENOMEM;  in sun5i_setup_clocksource()
207 		ret = -EINVAL;  in sun5i_setup_clocksource()
211 	cs->timer.base = base;  in sun5i_setup_clocksource()
212 	cs->timer.clk = clk;  in sun5i_setup_clocksource()
213 	cs->timer.clk_rate_cb.notifier_call = sun5i_rate_cb_clksrc;  in sun5i_setup_clocksource()
214 	cs->timer.clk_rate_cb.next = NULL;  in sun5i_setup_clocksource()
216 	ret = clk_notifier_register(clk, &cs->timer.clk_rate_cb);  in sun5i_setup_clocksource()
226 	cs->clksrc.name = node->name;  in sun5i_setup_clocksource()
227 	cs->clksrc.rating = 340;  in sun5i_setup_clocksource()
228 	cs->clksrc.read = sun5i_clksrc_read;  in sun5i_setup_clocksource()
229 	cs->clksrc.mask = CLOCKSOURCE_MASK(32);  in sun5i_setup_clocksource()
230 	cs->clksrc.flags = CLOCK_SOURCE_IS_CONTINUOUS;  in sun5i_setup_clocksource()
232 	ret = clocksource_register_hz(&cs->clksrc, rate);  in sun5i_setup_clocksource()
241 	clk_notifier_unregister(clk, &cs->timer.clk_rate_cb);  in sun5i_setup_clocksource()
245 	kfree(cs);  in sun5i_setup_clocksource()
257 		clockevents_update_freq(&ce->clkevt, ndata->new_rate);  in sun5i_rate_cb_clkevt()
258 		ce->timer.ticks_per_jiffy = DIV_ROUND_UP(ndata->new_rate, HZ);  in sun5i_rate_cb_clkevt()
274 		return -ENOMEM;  in sun5i_setup_clockevent()
285 		ret = -EINVAL;  in sun5i_setup_clockevent()
289 	ce->timer.base = base;  in sun5i_setup_clockevent()
290 	ce->timer.ticks_per_jiffy = DIV_ROUND_UP(rate, HZ);  in sun5i_setup_clockevent()
291 	ce->timer.clk = clk;  in sun5i_setup_clockevent()
292 	ce->timer.clk_rate_cb.notifier_call = sun5i_rate_cb_clkevt;  in sun5i_setup_clockevent()
293 	ce->timer.clk_rate_cb.next = NULL;  in sun5i_setup_clockevent()
295 	ret = clk_notifier_register(clk, &ce->timer.clk_rate_cb);  in sun5i_setup_clockevent()
301 	ce->clkevt.name = node->name;  in sun5i_setup_clockevent()
302 	ce->clkevt.features = CLOCK_EVT_FEAT_PERIODIC | CLOCK_EVT_FEAT_ONESHOT;  in sun5i_setup_clockevent()
303 	ce->clkevt.set_next_event = sun5i_clkevt_next_event;  in sun5i_setup_clockevent()
304 	ce->clkevt.set_state_shutdown = sun5i_clkevt_shutdown;  in sun5i_setup_clockevent()
305 	ce->clkevt.set_state_periodic = sun5i_clkevt_set_periodic;  in sun5i_setup_clockevent()
306 	ce->clkevt.set_state_oneshot = sun5i_clkevt_set_oneshot;  in sun5i_setup_clockevent()
307 	ce->clkevt.tick_resume = sun5i_clkevt_shutdown;  in sun5i_setup_clockevent()
308 	ce->clkevt.rating = 340;  in sun5i_setup_clockevent()
309 	ce->clkevt.irq = irq;  in sun5i_setup_clockevent()
310 	ce->clkevt.cpumask = cpu_possible_mask;  in sun5i_setup_clockevent()
316 	clockevents_config_and_register(&ce->clkevt, rate,  in sun5i_setup_clockevent()
329 	clk_notifier_unregister(clk, &ce->timer.clk_rate_cb);  in sun5i_setup_clockevent()
353 		return -EINVAL;  in sun5i_timer_init()
372 TIMER_OF_DECLARE(sun5i_a13, "allwinner,sun5i-a13-hstimer",
374 TIMER_OF_DECLARE(sun7i_a20, "allwinner,sun7i-a20-hstimer",