7  * COPYING in the main directory of this source tree, or the
10  *     Redistribution and use in source and binary forms, with or
14  *      - Redistributions of source code must retain the above
18  *      - Redistributions in binary form must reproduce the above
36 #include <linux/clk.h>
51 			     struct clk **clk)  in nps_get_timer_clk()  argument
55 	*clk = of_clk_get(node, 0);  in nps_get_timer_clk()
56 	ret = PTR_ERR_OR_ZERO(*clk);  in nps_get_timer_clk()
58 		pr_err("timer missing clk\n");  in nps_get_timer_clk()
62 	ret = clk_prepare_enable(*clk);  in nps_get_timer_clk()
64 		pr_err("Couldn't enable parent clk\n");  in nps_get_timer_clk()
65 		clk_put(*clk);  in nps_get_timer_clk()
69 	*timer_freq = clk_get_rate(*clk);  in nps_get_timer_clk()
71 		pr_err("Couldn't get clk rate\n");  in nps_get_timer_clk()
72 		clk_disable_unprepare(*clk);  in nps_get_timer_clk()
73 		clk_put(*clk);  in nps_get_timer_clk()
74 		return -EINVAL;  in nps_get_timer_clk()
90 	struct clk *clk;  in nps_setup_clocksource()  local
99 	ret = nps_get_timer_clk(node, &nps_timer1_freq, &clk);  in nps_setup_clocksource()
103 	ret = clocksource_mmio_init(nps_msu_reg_low_addr, "nps-tick",  in nps_setup_clocksource()
106 		pr_err("Couldn't register clock source.\n");  in nps_setup_clocksource()
107 		clk_disable_unprepare(clk);  in nps_setup_clocksource()
113 TIMER_OF_DECLARE(ezchip_nps400_clksrc, "ezchip,nps400-timer",
115 TIMER_OF_DECLARE(ezchip_nps400_clk_src, "ezchip,nps400-timer1",
128  * Interrupt Enabled (IE) - re-arm the timer
129  * Not Halted (NH) - is cleared when working with JTAG (for debug)
151 	/* Acknowledge and if needed re-arm the timer */  in nps_clkevent_rm_thread()
220 	evt->event_handler(evt);  in timer_irq_handler()
229 	evt->cpumask = cpumask_of(smp_processor_id());  in nps_timer_starting_cpu()
245 	struct clk *clk;  in nps_setup_clockevent()  local
251 		return -EINVAL;  in nps_setup_clockevent()
254 	ret = nps_get_timer_clk(node, &nps_timer0_freq, &clk);  in nps_setup_clockevent()
260 				 "Timer0 (per-cpu-tick)",  in nps_setup_clockevent()
264 		clk_disable_unprepare(clk);  in nps_setup_clockevent()
274 		clk_disable_unprepare(clk);  in nps_setup_clockevent()
282 TIMER_OF_DECLARE(ezchip_nps400_clk_evt, "ezchip,nps400-timer0",