1 // SPDX-License-Identifier: GPL-2.0-only
7  * Copyright (C) 2012-2015 Linus Walleij
17 #include <linux/clk-provider.h>
23 #include "clk-icst.h"
34 #define INTEGRATOR_AP_PCI_25_33_MHZ BIT(8)
37  * struct clk_icst - ICST VCO clock wrapper
58  * vco_get() - get ICST VCO settings from a certain ICST
67 	ret = regmap_read(icst->map, icst->vcoreg_off, &val);  in vco_get()
73 	 * bits of the v PLL divider. Bit 8 is tied low and always zero,  in vco_get()
74 	 * r is hardwired to 22 and output divider s is hardwired to 1  in vco_get()
76 	 * "Integrator CM926EJ-S, CM946E-S, CM966E-S, CM1026EJ-S and  in vco_get()
77 	 * CM1136JF-S User Guide" ARM DUI 0138E, page 3-13 thru 3-14.  in vco_get()
79 	if (icst->ctype == ICST_INTEGRATOR_AP_CM) {  in vco_get()
80 		vco->v = val & INTEGRATOR_AP_CM_BITS;  in vco_get()
81 		vco->r = 22;  in vco_get()
82 		vco->s = 1;  in vco_get()
88 	 * access the low eight bits of the v PLL divider. Bit 8 is tied low  in vco_get()
92 	 * page 3-16.  in vco_get()
94 	if (icst->ctype == ICST_INTEGRATOR_AP_SYS) {  in vco_get()
95 		vco->v = val & INTEGRATOR_AP_SYS_BITS;  in vco_get()
96 		vco->r = 46;  in vco_get()
97 		vco->s = 3;  in vco_get()
105 	 * bit to 0 yields v = 17, r = 22 and OD = 1, whereas setting the  in vco_get()
106 	 * bit to 1 yields v = 14, r = 14 and OD = 1 giving the frequencies  in vco_get()
109 	if (icst->ctype == ICST_INTEGRATOR_AP_PCI) {  in vco_get()
112 		vco->v = divxy ? 17 : 14;  in vco_get()
113 		vco->r = divxy ? 22 : 14;  in vco_get()
114 		vco->s = 1;  in vco_get()
120 	 * of the v PLL divider. Bit 8 is tied low and always zero,  in vco_get()
122 	 * in bits 8 thru 10 according to the document  in vco_get()
124 	 * ARM DUI 0157A, page 3-20 thru 3-23 and 4-10.  in vco_get()
126 	if (icst->ctype == ICST_INTEGRATOR_CP_CM_CORE) {  in vco_get()
127 		vco->v = val & 0xFF;  in vco_get()
128 		vco->r = 22;  in vco_get()
129 		vco->s = (val >> 8) & 7;  in vco_get()
133 	if (icst->ctype == ICST_INTEGRATOR_CP_CM_MEM) {  in vco_get()
134 		vco->v = (val >> 12) & 0xFF;  in vco_get()
135 		vco->r = 22;  in vco_get()
136 		vco->s = (val >> 20) & 7;  in vco_get()
140 	vco->v = val & 0x1ff;  in vco_get()
141 	vco->r = (val >> 9) & 0x7f;  in vco_get()
142 	vco->s = (val >> 16) & 03;  in vco_get()
147  * vco_set() - commit changes to an ICST VCO
158 	switch (icst->ctype) {  in vco_set()
161 		val = vco.v & 0xFF;  in vco_set()
162 		if (vco.v & 0x100)  in vco_set()
163 			pr_err("ICST error: tried to set bit 8 of VDW\n");  in vco_set()
164 		if (vco.s != 1)  in vco_set()
165 			pr_err("ICST error: tried to use VOD != 1\n");  in vco_set()
171 		val = vco.v & 0xFF;  in vco_set()
172 		if (vco.v & 0x100)  in vco_set()
173 			pr_err("ICST error: tried to set bit 8 of VDW\n");  in vco_set()
175 			pr_err("ICST error: tried to use VOD != 1\n");  in vco_set()
181 		val = (vco.v & 0xFF) | vco.s << 8;  in vco_set()
182 		if (vco.v & 0x100)  in vco_set()
183 			pr_err("ICST error: tried to set bit 8 of VDW\n");  in vco_set()
189 		val = ((vco.v & 0xFF) << 12) | (vco.s << 20);  in vco_set()
190 		if (vco.v & 0x100)  in vco_set()
191 			pr_err("ICST error: tried to set bit 8 of VDW\n");  in vco_set()
198 		val = vco.v | (vco.r << 9) | (vco.s << 16);  in vco_set()
205 	ret = regmap_write(icst->map, icst->lockreg_off, VERSATILE_LOCK_VAL);  in vco_set()
208 	ret = regmap_update_bits(icst->map, icst->vcoreg_off, mask, val);  in vco_set()
212 	ret = regmap_write(icst->map, icst->lockreg_off, 0);  in vco_set()
226 		icst->params->ref = parent_rate;  in icst_recalc_rate()
232 	icst->rate = icst_hz(icst->params, vco);  in icst_recalc_rate()
233 	return icst->rate;  in icst_recalc_rate()
242 	if (icst->ctype == ICST_INTEGRATOR_AP_CM ||  in icst_round_rate()
243 	    icst->ctype == ICST_INTEGRATOR_CP_CM_CORE) {  in icst_round_rate()
252 	if (icst->ctype == ICST_INTEGRATOR_CP_CM_MEM) {  in icst_round_rate()
261 	if (icst->ctype == ICST_INTEGRATOR_AP_SYS) {  in icst_round_rate()
271 	if (icst->ctype == ICST_INTEGRATOR_AP_PCI) {  in icst_round_rate()
282 	vco = icst_hz_to_vco(icst->params, rate);  in icst_round_rate()
283 	return icst_hz(icst->params, vco);  in icst_round_rate()
292 	if (icst->ctype == ICST_INTEGRATOR_AP_PCI) {  in icst_set_rate()
304 			return -EINVAL;  in icst_set_rate()
306 		ret = regmap_write(icst->map, icst->lockreg_off,  in icst_set_rate()
310 		ret = regmap_update_bits(icst->map, icst->vcoreg_off,  in icst_set_rate()
316 		ret = regmap_write(icst->map, icst->lockreg_off, 0);  in icst_set_rate()
323 		icst->params->ref = parent_rate;  in icst_set_rate()
324 	vco = icst_hz_to_vco(icst->params, rate);  in icst_set_rate()
325 	icst->rate = icst_hz(icst->params, vco);  in icst_set_rate()
349 		return ERR_PTR(-ENOMEM);  in icst_clk_setup()
351 	pclone = kmemdup(desc->params, sizeof(*pclone), GFP_KERNEL);  in icst_clk_setup()
354 		return ERR_PTR(-ENOMEM);  in icst_clk_setup()
361 	init.num_parents = (parent_name ? 1 : 0);  in icst_clk_setup()
362 	icst->map = map;  in icst_clk_setup()
363 	icst->hw.init = &init;  in icst_clk_setup()
364 	icst->params = pclone;  in icst_clk_setup()
365 	icst->vcoreg_off = desc->vco_offset;  in icst_clk_setup()
366 	icst->lockreg_off = desc->lock_offset;  in icst_clk_setup()
367 	icst->ctype = ctype;  in icst_clk_setup()
369 	clk = clk_register(dev, &icst->hw);  in icst_clk_setup()
404  * In a device tree, an memory-mapped ICST clock appear as a child
412 	.vd_min		= 8,
423 	.vd_min		= 4 + 8,
424 	.vd_max		= 511 + 8,
425 	.rd_min		= 1 + 2,
442 	 * CM926EJ-S, CM1026EJ-S and CM1136JF-S can actually
486 	const char *name = np->name;  in of_syscon_icst_setup()
494 		pr_err("no parent node for syscon ICST clock\n");  in of_syscon_icst_setup()
499 		pr_err("no regmap for syscon ICST clock parent\n");  in of_syscon_icst_setup()
503 	if (of_property_read_u32(np, "vco-offset", &icst_desc.vco_offset)) {  in of_syscon_icst_setup()
504 		pr_err("no VCO register offset for ICST clock\n");  in of_syscon_icst_setup()
507 	if (of_property_read_u32(np, "lock-offset", &icst_desc.lock_offset)) {  in of_syscon_icst_setup()
508 		pr_err("no lock register offset for ICST clock\n");  in of_syscon_icst_setup()
512 	if (of_device_is_compatible(np, "arm,syscon-icst525")) {  in of_syscon_icst_setup()
515 	} else if (of_device_is_compatible(np, "arm,syscon-icst307")) {  in of_syscon_icst_setup()
518 	} else if (of_device_is_compatible(np, "arm,syscon-icst525-integratorap-cm")) {  in of_syscon_icst_setup()
521 	} else if (of_device_is_compatible(np, "arm,syscon-icst525-integratorap-sys")) {  in of_syscon_icst_setup()
524 	} else if (of_device_is_compatible(np, "arm,syscon-icst525-integratorap-pci")) {  in of_syscon_icst_setup()
527 	} else if (of_device_is_compatible(np, "arm,syscon-icst525-integratorcp-cm-core")) {  in of_syscon_icst_setup()
530 	} else if (of_device_is_compatible(np, "arm,syscon-icst525-integratorcp-cm-mem")) {  in of_syscon_icst_setup()
551 	       "arm,syscon-icst525", of_syscon_icst_setup);
553 	       "arm,syscon-icst307", of_syscon_icst_setup);
555 	       "arm,syscon-icst525-integratorap-cm", of_syscon_icst_setup);
557 	       "arm,syscon-icst525-integratorap-sys", of_syscon_icst_setup);
559 	       "arm,syscon-icst525-integratorap-pci", of_syscon_icst_setup);
561 	       "arm,syscon-icst525-integratorcp-cm-core", of_syscon_icst_setup);
563 	       "arm,syscon-icst525-integratorcp-cm-mem", of_syscon_icst_setup);