Lines Matching full:common
150 .common = {
190 .common = {
378 &pll_cpu_clk.common,
379 &pll_audio_base_clk.common,
380 &pll_video_clk.common,
381 &pll_ve_clk.common,
382 &pll_ddr0_clk.common,
383 &pll_periph0_clk.common,
384 &pll_isp_clk.common,
385 &pll_periph1_clk.common,
386 &pll_ddr1_clk.common,
387 &cpu_clk.common,
388 &axi_clk.common,
389 &ahb1_clk.common,
390 &apb1_clk.common,
391 &apb2_clk.common,
392 &ahb2_clk.common,
393 &bus_ce_clk.common,
394 &bus_dma_clk.common,
395 &bus_mmc0_clk.common,
396 &bus_mmc1_clk.common,
397 &bus_mmc2_clk.common,
398 &bus_dram_clk.common,
399 &bus_emac_clk.common,
400 &bus_hstimer_clk.common,
401 &bus_spi0_clk.common,
402 &bus_otg_clk.common,
403 &bus_ehci0_clk.common,
404 &bus_ohci0_clk.common,
405 &bus_ve_clk.common,
406 &bus_tcon0_clk.common,
407 &bus_csi_clk.common,
408 &bus_de_clk.common,
409 &bus_codec_clk.common,
410 &bus_pio_clk.common,
411 &bus_i2c0_clk.common,
412 &bus_i2c1_clk.common,
413 &bus_uart0_clk.common,
414 &bus_uart1_clk.common,
415 &bus_uart2_clk.common,
416 &bus_ephy_clk.common,
417 &bus_dbg_clk.common,
418 &mmc0_clk.common,
419 &mmc0_sample_clk.common,
420 &mmc0_output_clk.common,
421 &mmc1_clk.common,
422 &mmc1_sample_clk.common,
423 &mmc1_output_clk.common,
424 &mmc2_clk.common,
425 &mmc2_sample_clk.common,
426 &mmc2_output_clk.common,
427 &ce_clk.common,
428 &spi0_clk.common,
429 &usb_phy0_clk.common,
430 &usb_ohci0_clk.common,
431 &dram_clk.common,
432 &dram_ve_clk.common,
433 &dram_csi_clk.common,
434 &dram_ohci_clk.common,
435 &dram_ehci_clk.common,
436 &de_clk.common,
437 &tcon_clk.common,
438 &csi_misc_clk.common,
439 &csi0_mclk_clk.common,
440 &csi1_sclk_clk.common,
441 &csi1_mclk_clk.common,
442 &ve_clk.common,
443 &ac_dig_clk.common,
444 &avs_clk.common,
445 &mbus_clk.common,
446 &mipi_csi_clk.common,
450 &pll_audio_base_clk.common.hw
454 &pll_cpu_clk.common,
455 &pll_audio_base_clk.common,
456 &pll_video_clk.common,
457 &pll_ve_clk.common,
458 &pll_ddr0_clk.common,
459 &pll_periph0_clk.common,
460 &pll_isp_clk.common,
461 &pll_periph1_clk.common,
462 &pll_ddr1_clk.common,
463 &cpu_clk.common,
464 &axi_clk.common,
465 &ahb1_clk.common,
466 &apb1_clk.common,
467 &apb2_clk.common,
468 &ahb2_clk.common,
469 &bus_ce_clk.common,
470 &bus_dma_clk.common,
471 &bus_mmc0_clk.common,
472 &bus_mmc1_clk.common,
473 &bus_mmc2_clk.common,
474 &bus_dram_clk.common,
475 &bus_emac_clk.common,
476 &bus_hstimer_clk.common,
477 &bus_spi0_clk.common,
478 &bus_otg_clk.common,
479 &bus_ehci0_clk.common,
480 &bus_ohci0_clk.common,
481 &bus_ve_clk.common,
482 &bus_tcon0_clk.common,
483 &bus_csi_clk.common,
484 &bus_de_clk.common,
485 &bus_codec_clk.common,
486 &bus_pio_clk.common,
487 &bus_i2s0_clk.common,
488 &bus_i2c0_clk.common,
489 &bus_i2c1_clk.common,
490 &bus_uart0_clk.common,
491 &bus_uart1_clk.common,
492 &bus_uart2_clk.common,
493 &bus_ephy_clk.common,
494 &bus_dbg_clk.common,
495 &mmc0_clk.common,
496 &mmc0_sample_clk.common,
497 &mmc0_output_clk.common,
498 &mmc1_clk.common,
499 &mmc1_sample_clk.common,
500 &mmc1_output_clk.common,
501 &mmc2_clk.common,
502 &mmc2_sample_clk.common,
503 &mmc2_output_clk.common,
504 &ce_clk.common,
505 &spi0_clk.common,
506 &i2s0_clk.common,
507 &usb_phy0_clk.common,
508 &usb_ohci0_clk.common,
509 &dram_clk.common,
510 &dram_ve_clk.common,
511 &dram_csi_clk.common,
512 &dram_ohci_clk.common,
513 &dram_ehci_clk.common,
514 &de_clk.common,
515 &tcon_clk.common,
516 &csi_misc_clk.common,
517 &csi0_mclk_clk.common,
518 &csi1_sclk_clk.common,
519 &csi1_mclk_clk.common,
520 &ve_clk.common,
521 &ac_dig_clk.common,
522 &avs_clk.common,
523 &mbus_clk.common,
524 &mipi_csi_clk.common,
541 &pll_periph0_clk.common.hw,
546 [CLK_PLL_CPU] = &pll_cpu_clk.common.hw,
547 [CLK_PLL_AUDIO_BASE] = &pll_audio_base_clk.common.hw,
552 [CLK_PLL_VIDEO] = &pll_video_clk.common.hw,
553 [CLK_PLL_VE] = &pll_ve_clk.common.hw,
554 [CLK_PLL_DDR0] = &pll_ddr0_clk.common.hw,
555 [CLK_PLL_PERIPH0] = &pll_periph0_clk.common.hw,
557 [CLK_PLL_ISP] = &pll_isp_clk.common.hw,
558 [CLK_PLL_PERIPH1] = &pll_periph1_clk.common.hw,
559 [CLK_PLL_DDR1] = &pll_ddr1_clk.common.hw,
560 [CLK_CPU] = &cpu_clk.common.hw,
561 [CLK_AXI] = &axi_clk.common.hw,
562 [CLK_AHB1] = &ahb1_clk.common.hw,
563 [CLK_APB1] = &apb1_clk.common.hw,
564 [CLK_APB2] = &apb2_clk.common.hw,
565 [CLK_AHB2] = &ahb2_clk.common.hw,
566 [CLK_BUS_CE] = &bus_ce_clk.common.hw,
567 [CLK_BUS_DMA] = &bus_dma_clk.common.hw,
568 [CLK_BUS_MMC0] = &bus_mmc0_clk.common.hw,
569 [CLK_BUS_MMC1] = &bus_mmc1_clk.common.hw,
570 [CLK_BUS_MMC2] = &bus_mmc2_clk.common.hw,
571 [CLK_BUS_DRAM] = &bus_dram_clk.common.hw,
572 [CLK_BUS_EMAC] = &bus_emac_clk.common.hw,
573 [CLK_BUS_HSTIMER] = &bus_hstimer_clk.common.hw,
574 [CLK_BUS_SPI0] = &bus_spi0_clk.common.hw,
575 [CLK_BUS_OTG] = &bus_otg_clk.common.hw,
576 [CLK_BUS_EHCI0] = &bus_ehci0_clk.common.hw,
577 [CLK_BUS_OHCI0] = &bus_ohci0_clk.common.hw,
578 [CLK_BUS_VE] = &bus_ve_clk.common.hw,
579 [CLK_BUS_TCON0] = &bus_tcon0_clk.common.hw,
580 [CLK_BUS_CSI] = &bus_csi_clk.common.hw,
581 [CLK_BUS_DE] = &bus_de_clk.common.hw,
582 [CLK_BUS_CODEC] = &bus_codec_clk.common.hw,
583 [CLK_BUS_PIO] = &bus_pio_clk.common.hw,
584 [CLK_BUS_I2C0] = &bus_i2c0_clk.common.hw,
585 [CLK_BUS_I2C1] = &bus_i2c1_clk.common.hw,
586 [CLK_BUS_UART0] = &bus_uart0_clk.common.hw,
587 [CLK_BUS_UART1] = &bus_uart1_clk.common.hw,
588 [CLK_BUS_UART2] = &bus_uart2_clk.common.hw,
589 [CLK_BUS_EPHY] = &bus_ephy_clk.common.hw,
590 [CLK_BUS_DBG] = &bus_dbg_clk.common.hw,
591 [CLK_MMC0] = &mmc0_clk.common.hw,
592 [CLK_MMC0_SAMPLE] = &mmc0_sample_clk.common.hw,
593 [CLK_MMC0_OUTPUT] = &mmc0_output_clk.common.hw,
594 [CLK_MMC1] = &mmc1_clk.common.hw,
595 [CLK_MMC1_SAMPLE] = &mmc1_sample_clk.common.hw,
596 [CLK_MMC1_OUTPUT] = &mmc1_output_clk.common.hw,
597 [CLK_MMC2] = &mmc2_clk.common.hw,
598 [CLK_MMC2_SAMPLE] = &mmc2_sample_clk.common.hw,
599 [CLK_MMC2_OUTPUT] = &mmc2_output_clk.common.hw,
600 [CLK_CE] = &ce_clk.common.hw,
601 [CLK_SPI0] = &spi0_clk.common.hw,
602 [CLK_USB_PHY0] = &usb_phy0_clk.common.hw,
603 [CLK_USB_OHCI0] = &usb_ohci0_clk.common.hw,
604 [CLK_DRAM] = &dram_clk.common.hw,
605 [CLK_DRAM_VE] = &dram_ve_clk.common.hw,
606 [CLK_DRAM_CSI] = &dram_csi_clk.common.hw,
607 [CLK_DRAM_EHCI] = &dram_ehci_clk.common.hw,
608 [CLK_DRAM_OHCI] = &dram_ohci_clk.common.hw,
609 [CLK_DE] = &de_clk.common.hw,
610 [CLK_TCON0] = &tcon_clk.common.hw,
611 [CLK_CSI_MISC] = &csi_misc_clk.common.hw,
612 [CLK_CSI0_MCLK] = &csi0_mclk_clk.common.hw,
613 [CLK_CSI1_SCLK] = &csi1_sclk_clk.common.hw,
614 [CLK_CSI1_MCLK] = &csi1_mclk_clk.common.hw,
615 [CLK_VE] = &ve_clk.common.hw,
616 [CLK_AC_DIG] = &ac_dig_clk.common.hw,
617 [CLK_AVS] = &avs_clk.common.hw,
618 [CLK_MBUS] = &mbus_clk.common.hw,
619 [CLK_MIPI_CSI] = &mipi_csi_clk.common.hw,
626 [CLK_PLL_CPU] = &pll_cpu_clk.common.hw,
627 [CLK_PLL_AUDIO_BASE] = &pll_audio_base_clk.common.hw,
632 [CLK_PLL_VIDEO] = &pll_video_clk.common.hw,
633 [CLK_PLL_VE] = &pll_ve_clk.common.hw,
634 [CLK_PLL_DDR0] = &pll_ddr0_clk.common.hw,
635 [CLK_PLL_PERIPH0] = &pll_periph0_clk.common.hw,
637 [CLK_PLL_ISP] = &pll_isp_clk.common.hw,
638 [CLK_PLL_PERIPH1] = &pll_periph1_clk.common.hw,
639 [CLK_PLL_DDR1] = &pll_ddr1_clk.common.hw,
640 [CLK_CPU] = &cpu_clk.common.hw,
641 [CLK_AXI] = &axi_clk.common.hw,
642 [CLK_AHB1] = &ahb1_clk.common.hw,
643 [CLK_APB1] = &apb1_clk.common.hw,
644 [CLK_APB2] = &apb2_clk.common.hw,
645 [CLK_AHB2] = &ahb2_clk.common.hw,
646 [CLK_BUS_CE] = &bus_ce_clk.common.hw,
647 [CLK_BUS_DMA] = &bus_dma_clk.common.hw,
648 [CLK_BUS_MMC0] = &bus_mmc0_clk.common.hw,
649 [CLK_BUS_MMC1] = &bus_mmc1_clk.common.hw,
650 [CLK_BUS_MMC2] = &bus_mmc2_clk.common.hw,
651 [CLK_BUS_DRAM] = &bus_dram_clk.common.hw,
652 [CLK_BUS_EMAC] = &bus_emac_clk.common.hw,
653 [CLK_BUS_HSTIMER] = &bus_hstimer_clk.common.hw,
654 [CLK_BUS_SPI0] = &bus_spi0_clk.common.hw,
655 [CLK_BUS_OTG] = &bus_otg_clk.common.hw,
656 [CLK_BUS_EHCI0] = &bus_ehci0_clk.common.hw,
657 [CLK_BUS_OHCI0] = &bus_ohci0_clk.common.hw,
658 [CLK_BUS_VE] = &bus_ve_clk.common.hw,
659 [CLK_BUS_TCON0] = &bus_tcon0_clk.common.hw,
660 [CLK_BUS_CSI] = &bus_csi_clk.common.hw,
661 [CLK_BUS_DE] = &bus_de_clk.common.hw,
662 [CLK_BUS_CODEC] = &bus_codec_clk.common.hw,
663 [CLK_BUS_PIO] = &bus_pio_clk.common.hw,
664 [CLK_BUS_I2S0] = &bus_i2s0_clk.common.hw,
665 [CLK_BUS_I2C0] = &bus_i2c0_clk.common.hw,
666 [CLK_BUS_I2C1] = &bus_i2c1_clk.common.hw,
667 [CLK_BUS_UART0] = &bus_uart0_clk.common.hw,
668 [CLK_BUS_UART1] = &bus_uart1_clk.common.hw,
669 [CLK_BUS_UART2] = &bus_uart2_clk.common.hw,
670 [CLK_BUS_EPHY] = &bus_ephy_clk.common.hw,
671 [CLK_BUS_DBG] = &bus_dbg_clk.common.hw,
672 [CLK_MMC0] = &mmc0_clk.common.hw,
673 [CLK_MMC0_SAMPLE] = &mmc0_sample_clk.common.hw,
674 [CLK_MMC0_OUTPUT] = &mmc0_output_clk.common.hw,
675 [CLK_MMC1] = &mmc1_clk.common.hw,
676 [CLK_MMC1_SAMPLE] = &mmc1_sample_clk.common.hw,
677 [CLK_MMC1_OUTPUT] = &mmc1_output_clk.common.hw,
678 [CLK_MMC2] = &mmc2_clk.common.hw,
679 [CLK_MMC2_SAMPLE] = &mmc2_sample_clk.common.hw,
680 [CLK_MMC2_OUTPUT] = &mmc2_output_clk.common.hw,
681 [CLK_CE] = &ce_clk.common.hw,
682 [CLK_SPI0] = &spi0_clk.common.hw,
683 [CLK_I2S0] = &i2s0_clk.common.hw,
684 [CLK_USB_PHY0] = &usb_phy0_clk.common.hw,
685 [CLK_USB_OHCI0] = &usb_ohci0_clk.common.hw,
686 [CLK_DRAM] = &dram_clk.common.hw,
687 [CLK_DRAM_VE] = &dram_ve_clk.common.hw,
688 [CLK_DRAM_CSI] = &dram_csi_clk.common.hw,
689 [CLK_DRAM_EHCI] = &dram_ehci_clk.common.hw,
690 [CLK_DRAM_OHCI] = &dram_ohci_clk.common.hw,
691 [CLK_DE] = &de_clk.common.hw,
692 [CLK_TCON0] = &tcon_clk.common.hw,
693 [CLK_CSI_MISC] = &csi_misc_clk.common.hw,
694 [CLK_CSI0_MCLK] = &csi0_mclk_clk.common.hw,
695 [CLK_CSI1_SCLK] = &csi1_sclk_clk.common.hw,
696 [CLK_CSI1_MCLK] = &csi1_mclk_clk.common.hw,
697 [CLK_VE] = &ve_clk.common.hw,
698 [CLK_AC_DIG] = &ac_dig_clk.common.hw,
699 [CLK_AVS] = &avs_clk.common.hw,
700 [CLK_MBUS] = &mbus_clk.common.hw,
701 [CLK_MIPI_CSI] = &mipi_csi_clk.common.hw,