Lines Matching +full:0 +full:x18c

24 	{ .index = 3, .shift = 0, .width = 5 },
39 		.reg		= 0x000,
44 						      0),
48 static CLK_FIXED_FACTOR_HW(r_ahb_clk, "r-ahb", &r_cpus_clk.common.hw, 1, 1, 0);
51 	.div		= _SUNXI_CCU_DIV(0, 2),
54 		.reg		= 0x00c,
58 					      0),
74 		.reg		= 0x010,
79 						      0),
92 			   0x11c, BIT(0), 0);
95 			   0x12c, BIT(0), 0);
100 		     0x130, 24, 2, 0);
103 			   clk_parent_r_apb1, 0x13c, BIT(0), 0);
106 			   0x17c, BIT(0), 0);
109 			   0x18c, BIT(0), 0);
112 			   0x19c, BIT(0), 0);
115 			   0x19c, BIT(1), 0);
119 				  r_apb1_ir_rx_parents, 0x1c0,
120 				  0, 5,		/* M */
124 				  0);
127 			   clk_parent_r_apb1, 0x1cc, BIT(0), 0);
130 		      0x20c, BIT(0), 0);
171 	[RST_R_APB1_TIMER]	=  { 0x11c, BIT(16) },
172 	[RST_R_APB1_BUS_PWM]	=  { 0x13c, BIT(16) },
173 	[RST_R_APB1_PPU]	=  { 0x17c, BIT(16) },
174 	[RST_R_APB2_UART]	=  { 0x18c, BIT(16) },
175 	[RST_R_APB2_I2C0]	=  { 0x19c, BIT(16) },
176 	[RST_R_APB2_I2C1]	=  { 0x19c, BIT(17) },
177 	[RST_R_APB1_BUS_IR]	=  { 0x1cc, BIT(16) },
178 	[RST_R_AHB_BUS_RTC]	=  { 0x20c, BIT(16) },
195 	reg = devm_platform_ioremap_resource(pdev, 0);  in sun50i_a100_r_ccu_probe()