clk/socfpga/clk-agilex.c

191 	{ AGILEX_BOOT_CLK, "boot_clk", boot_mux, ARRAY_SIZE(boot_mux), 0,
192 	  0x0},
194 	  0, 0x48},
196 	  0, 0x9c},
200 	{ AGILEX_MAIN_PLL_C0_CLK, "main_pll_c0", "main_pll", NULL, 1, 0, 0x58},
201 	{ AGILEX_MAIN_PLL_C1_CLK, "main_pll_c1", "main_pll", NULL, 1, 0, 0x5C},
202 	{ AGILEX_MAIN_PLL_C2_CLK, "main_pll_c2", "main_pll", NULL, 1, 0, 0x64},
203 	{ AGILEX_MAIN_PLL_C3_CLK, "main_pll_c3", "main_pll", NULL, 1, 0, 0x68},
204 	{ AGILEX_PERIPH_PLL_C0_CLK, "peri_pll_c0", "periph_pll", NULL, 1, 0, 0xAC},
205 	{ AGILEX_PERIPH_PLL_C1_CLK, "peri_pll_c1", "periph_pll", NULL, 1, 0, 0xB0},
206 	{ AGILEX_PERIPH_PLL_C2_CLK, "peri_pll_c2", "periph_pll", NULL, 1, 0, 0xB8},
207 	{ AGILEX_PERIPH_PLL_C3_CLK, "peri_pll_c3", "periph_pll", NULL, 1, 0, 0xBC},
212 	   0, 0x3C, 0, 0, 0},
214 	  0, 0x40, 0, 0, 1},
215 	{ AGILEX_L4_SYS_FREE_CLK, "l4_sys_free_clk", "noc_free_clk", NULL, 1, 0,
216 	  0, 4, 0, 0},
218 	  0, 0, 0, 0x30, 1},
220 	  0, 0xD4, 0, 0x88, 0},
222 	  0, 0xD8, 0, 0x88, 1},
224 	  ARRAY_SIZE(emac_ptp_free_mux), 0, 0xDC, 0, 0x88, 2},
226 	  ARRAY_SIZE(gpio_db_free_mux), 0, 0xE0, 0, 0x88, 3},
228 	  ARRAY_SIZE(sdmmc_free_mux), 0, 0xE4, 0, 0x88, 4},
230 	  ARRAY_SIZE(s2f_usr0_free_mux), 0, 0xE8, 0, 0, 0},
232 	  ARRAY_SIZE(s2f_usr1_free_mux), 0, 0xEC, 0, 0x88, 5},
234 	  ARRAY_SIZE(psi_ref_free_mux), 0, 0xF0, 0, 0x88, 6},
238 	{ AGILEX_MPU_CLK, "mpu_clk", NULL, mpu_mux, ARRAY_SIZE(mpu_mux), 0, 0x24,
239 	  0, 0, 0, 0, 0x30, 0, 0},
240 	{ AGILEX_MPU_PERIPH_CLK, "mpu_periph_clk", "mpu_clk", NULL, 1, 0, 0x24,
241 	  0, 0, 0, 0, 0, 0, 4},
242 	{ AGILEX_MPU_CCU_CLK, "mpu_ccu_clk", "mpu_clk", NULL, 1, 0, 0x24,
243 	  0, 0, 0, 0, 0, 0, 2},
244 	{ AGILEX_L4_MAIN_CLK, "l4_main_clk", "noc_clk", NULL, 1, 0, 0x24,
245 	  1, 0x44, 0, 2, 0, 0, 0},
246 	{ AGILEX_L4_MP_CLK, "l4_mp_clk", "noc_clk", NULL, 1, 0, 0x24,
247 	  2, 0x44, 8, 2, 0, 0, 0},
252 	{ AGILEX_L4_SP_CLK, "l4_sp_clk", "noc_clk", NULL, 1, CLK_IS_CRITICAL, 0x24,
253 	  3, 0x44, 16, 2, 0, 0, 0},
254 	{ AGILEX_CS_AT_CLK, "cs_at_clk", "noc_clk", NULL, 1, 0, 0x24,
255 	  4, 0x44, 24, 2, 0, 0, 0},
256 	{ AGILEX_CS_TRACE_CLK, "cs_trace_clk", "noc_clk", NULL, 1, 0, 0x24,
257 	  4, 0x44, 26, 2, 0, 0, 0},
258 	{ AGILEX_CS_PDBG_CLK, "cs_pdbg_clk", "cs_at_clk", NULL, 1, 0, 0x24,
259 	  4, 0x44, 28, 1, 0, 0, 0},
260 	{ AGILEX_CS_TIMER_CLK, "cs_timer_clk", "noc_clk", NULL, 1, 0, 0x24,
261 	  5, 0, 0, 0, 0, 0, 0},
262 	{ AGILEX_S2F_USER0_CLK, "s2f_user0_clk", NULL, s2f_usr0_mux, ARRAY_SIZE(s2f_usr0_mux), 0, 0x24,
263 	  6, 0, 0, 0, 0, 0, 0},
264 	{ AGILEX_EMAC0_CLK, "emac0_clk", NULL, emac_mux, ARRAY_SIZE(emac_mux), 0, 0x7C,
265 	  0, 0, 0, 0, 0x94, 26, 0},
266 	{ AGILEX_EMAC1_CLK, "emac1_clk", NULL, emac_mux, ARRAY_SIZE(emac_mux), 0, 0x7C,
267 	  1, 0, 0, 0, 0x94, 27, 0},
268 	{ AGILEX_EMAC2_CLK, "emac2_clk", NULL, emac_mux, ARRAY_SIZE(emac_mux), 0, 0x7C,
269 	  2, 0, 0, 0, 0x94, 28, 0},
270 	{ AGILEX_EMAC_PTP_CLK, "emac_ptp_clk", "emac_ptp_free_clk", NULL, 1, 0, 0x7C,
271 	  3, 0, 0, 0, 0, 0, 0},
272 	{ AGILEX_GPIO_DB_CLK, "gpio_db_clk", "gpio_db_free_clk", NULL, 1, 0, 0x7C,
273 	  4, 0x98, 0, 16, 0, 0, 0},
274 	{ AGILEX_SDMMC_CLK, "sdmmc_clk", "sdmmc_free_clk", NULL, 1, 0, 0x7C,
275 	  5, 0, 0, 0, 0, 0, 4},
276 	{ AGILEX_S2F_USER1_CLK, "s2f_user1_clk", "s2f_user1_free_clk", NULL, 1, 0, 0x7C,
277 	  6, 0, 0, 0, 0, 0, 0},
278 	{ AGILEX_PSI_REF_CLK, "psi_ref_clk", "psi_ref_free_clk", NULL, 1, 0, 0x7C,
279 	  7, 0, 0, 0, 0, 0, 0},
280 	{ AGILEX_USB_CLK, "usb_clk", "l4_mp_clk", NULL, 1, 0, 0x7C,
281 	  8, 0, 0, 0, 0, 0, 0},
282 	{ AGILEX_SPI_M_CLK, "spi_m_clk", "l4_mp_clk", NULL, 1, 0, 0x7C,
283 	  9, 0, 0, 0, 0, 0, 0},
284 	{ AGILEX_NAND_X_CLK, "nand_x_clk", "l4_mp_clk", NULL, 1, 0, 0x7C,
285 	  10, 0, 0, 0, 0, 0, 0},
286 	{ AGILEX_NAND_CLK, "nand_clk", "nand_x_clk", NULL, 1, 0, 0x7C,
287 	  10, 0, 0, 0, 0, 0, 4},
288 	{ AGILEX_NAND_ECC_CLK, "nand_ecc_clk", "nand_x_clk", NULL, 1, 0, 0x7C,
289 	  10, 0, 0, 0, 0, 0, 4},
299 	for (i = 0; i < nums; i++) {  in agilex_clk_register_c_perip()
308 	return 0;  in agilex_clk_register_c_perip()
318 	for (i = 0; i < nums; i++) {  in agilex_clk_register_cnt_perip()
328 	return 0;  in agilex_clk_register_cnt_perip()
337 	for (i = 0; i < nums; i++) {  in agilex_clk_register_gate()
347 	return 0;  in agilex_clk_register_gate()
357 	for (i = 0; i < nums; i++) {  in agilex_clk_register_pll()
367 	return 0;  in agilex_clk_register_pll()
381 	res = platform_get_resource(pdev, IORESOURCE_MEM, 0);  in __socfpga_agilex_clk_init()
423 	return 0;  in agilex_clkmgr_probe()