Lines Matching full:prci
16 * The FU540 PRCI implements clock and reset control for the SiFive
18 * over all PRCI resources.
20 * This driver is based on the PRCI driver written by Wesley Terpstra:
27 #include <dt-bindings/clock/sifive-fu540-prci.h>
140 * @va: base virtual address of the PRCI IP block
143 * PRCI per-device instance data
155 * @cfg0_offs: WRPLL CFG0 register offset (in bytes) from the PRCI base address
169 * struct __prci_clock - describes a clock device managed by PRCI
175 * @pd: PRCI-specific data associated with this clock (if not NULL)
177 * PRCI clock data. Used by the PRCI driver to register PRCI-provided
196 * __prci_readl() - read from a PRCI register
197 * @pd: PRCI context
198 * @offs: register offset to read from (in bytes, from PRCI base address)
201 * address of the PRCI register target described by @pd, and return
223 * @r: value read from the PRCI PLL configuration register
225 * Given a value @r read from an FU540 PRCI PLL configuration register,
266 * assemble a PRCI PLL configuration register value, and return it to
273 * Returns: a value suitable for writing into a PRCI PLL configuration
292 * __prci_wrpll_read_cfg() - read the WRPLL configuration from the PRCI
293 * @pd: PRCI context
294 * @pwd: PRCI WRPLL metadata
297 * the PRCI identified by @pd, and store it into the local configuration
310 * __prci_wrpll_write_cfg() - write WRPLL configuration into the PRCI
311 * @pd: PRCI context
312 * @pwd: PRCI WRPLL metadata
316 * configuration register identified by @pwd in the PRCI instance
336 * @pd: struct __prci_data * for the PRCI containing the CORECLK mux reg
356 * @pd: struct __prci_data * for the PRCI containing the CORECLK mux reg
463 * PRCI integration data for each WRPLL instance
481 * List of clock controls provided by the PRCI
511 * __prci_register_clocks() - register clock controls in the PRCI with Linux
607 dev_dbg(dev, "SiFive FU540 PRCI probed\n"); in sifive_fu540_prci_probe()
613 { .compatible = "sifive,fu540-c000-prci", },
620 .name = "sifive-fu540-prci",