163 	void (*enable_bypass)(struct __prci_data *pd);
164 	void (*disable_bypass)(struct __prci_data *pd);
175  * @pd: PRCI-specific data associated with this clock (if not NULL)
186 	struct __prci_data *pd;  member
197  * @pd: PRCI context
201  * address of the PRCI register target described by @pd, and return
206  * Return: the contents of the register described by @pd and @offs.
208 static u32 __prci_readl(struct __prci_data *pd, u32 offs)  in __prci_readl()  argument
210 	return readl_relaxed(pd->va + offs);  in __prci_readl()
213 static void __prci_writel(u32 v, u32 offs, struct __prci_data *pd)  in __prci_writel()  argument
215 	writel_relaxed(v, pd->va + offs);  in __prci_writel()
293  * @pd: PRCI context
297  * the PRCI identified by @pd, and store it into the local configuration
301  *          @pd and @pwd from changing during execution.
303 static void __prci_wrpll_read_cfg(struct __prci_data *pd,  in __prci_wrpll_read_cfg()  argument
306 	__prci_wrpll_unpack(&pwd->c, __prci_readl(pd, pwd->cfg0_offs));  in __prci_wrpll_read_cfg()
311  * @pd: PRCI context
321  *          @pd and @pwd from changing during execution.
323 static void __prci_wrpll_write_cfg(struct __prci_data *pd,  in __prci_wrpll_write_cfg()  argument
327 	__prci_writel(__prci_wrpll_pack(c), pwd->cfg0_offs, pd);  in __prci_wrpll_write_cfg()
336  * @pd: struct __prci_data * for the PRCI containing the CORECLK mux reg
343 static void __prci_coreclksel_use_hfclk(struct __prci_data *pd)  in __prci_coreclksel_use_hfclk()  argument
347 	r = __prci_readl(pd, PRCI_CORECLKSEL_OFFSET);  in __prci_coreclksel_use_hfclk()
349 	__prci_writel(r, PRCI_CORECLKSEL_OFFSET, pd);  in __prci_coreclksel_use_hfclk()
351 	r = __prci_readl(pd, PRCI_CORECLKSEL_OFFSET); /* barrier */  in __prci_coreclksel_use_hfclk()
356  * @pd: struct __prci_data * for the PRCI containing the CORECLK mux reg
363 static void __prci_coreclksel_use_corepll(struct __prci_data *pd)  in __prci_coreclksel_use_corepll()  argument
367 	r = __prci_readl(pd, PRCI_CORECLKSEL_OFFSET);  in __prci_coreclksel_use_corepll()
369 	__prci_writel(r, PRCI_CORECLKSEL_OFFSET, pd);  in __prci_coreclksel_use_corepll()
371 	r = __prci_readl(pd, PRCI_CORECLKSEL_OFFSET); /* barrier */  in __prci_coreclksel_use_corepll()
411 	struct __prci_data *pd = pc->pd;  in sifive_fu540_prci_wrpll_set_rate()  local
419 		pwd->enable_bypass(pd);  in sifive_fu540_prci_wrpll_set_rate()
421 	__prci_wrpll_write_cfg(pd, pwd, &pwd->c);  in sifive_fu540_prci_wrpll_set_rate()
426 		pwd->disable_bypass(pd);  in sifive_fu540_prci_wrpll_set_rate()
447 	struct __prci_data *pd = pc->pd;  in sifive_fu540_prci_tlclksel_recalc_rate()  local
451 	v = __prci_readl(pd, PRCI_CLKMUXSTATUSREG_OFFSET);  in sifive_fu540_prci_tlclksel_recalc_rate()
519 static int __prci_register_clocks(struct device *dev, struct __prci_data *pd)  in __prci_register_clocks()  argument
542 		pic->pd = pd;  in __prci_register_clocks()
545 			__prci_wrpll_read_cfg(pd, pic->pwd);  in __prci_register_clocks()
561 		pd->hw_clks.hws[i] = &pic->hw;  in __prci_register_clocks()
564 	pd->hw_clks.num = i;  in __prci_register_clocks()
567 					&pd->hw_clks);  in __prci_register_clocks()
586 	struct __prci_data *pd;  in sifive_fu540_prci_probe()  local
589 	pd = devm_kzalloc(dev,  in sifive_fu540_prci_probe()
590 			  struct_size(pd, hw_clks.hws,  in sifive_fu540_prci_probe()
593 	if (!pd)  in sifive_fu540_prci_probe()
597 	pd->va = devm_ioremap_resource(dev, res);  in sifive_fu540_prci_probe()
598 	if (IS_ERR(pd->va))  in sifive_fu540_prci_probe()
599 		return PTR_ERR(pd->va);  in sifive_fu540_prci_probe()
601 	r = __prci_register_clocks(dev, pd);  in sifive_fu540_prci_probe()