Lines Matching full:gate
144 GATE(ACLK_CCORE_133, "aclk_ccore_133", "dout_aclk_ccore_133",
147 GATE(ACLK_MSCL_532, "aclk_mscl_532", "dout_aclk_mscl_532",
150 GATE(ACLK_PERIS_66, "aclk_peris_66", "dout_aclk_peris_66",
153 GATE(SCLK_AUD_PLL, "sclk_aud_pll", "dout_sclk_aud_pll",
155 GATE(SCLK_MFC_PLL_B, "sclk_mfc_pll_b", "dout_sclk_mfc_pll",
157 GATE(SCLK_MFC_PLL_A, "sclk_mfc_pll_a", "dout_sclk_mfc_pll",
159 GATE(SCLK_BUS1_PLL_B, "sclk_bus1_pll_b", "dout_sclk_bus1_pll",
161 GATE(SCLK_BUS1_PLL_A, "sclk_bus1_pll_a", "dout_sclk_bus1_pll",
163 GATE(SCLK_BUS0_PLL_B, "sclk_bus0_pll_b", "dout_sclk_bus0_pll",
165 GATE(SCLK_BUS0_PLL_A, "sclk_bus0_pll_a", "dout_sclk_bus0_pll",
167 GATE(SCLK_CC_PLL_B, "sclk_cc_pll_b", "dout_sclk_cc_pll",
169 GATE(SCLK_CC_PLL_A, "sclk_cc_pll_a", "dout_sclk_cc_pll",
338 GATE(CLK_ACLK_PERIC0_66, "aclk_peric0_66", "dout_aclk_peric0_66",
340 GATE(CLK_ACLK_PERIC1_66, "aclk_peric1_66", "dout_aclk_peric1_66",
343 GATE(CLK_SCLK_SPDIF, "sclk_spdif", "dout_sclk_spdif",
345 GATE(CLK_SCLK_PCM1, "sclk_pcm1", "dout_sclk_pcm1",
347 GATE(CLK_SCLK_I2S1, "sclk_i2s1", "dout_sclk_i2s1",
350 GATE(CLK_SCLK_SPI1, "sclk_spi1", "dout_sclk_spi1",
352 GATE(CLK_SCLK_SPI0, "sclk_spi0", "dout_sclk_spi0",
355 GATE(CLK_SCLK_SPI3, "sclk_spi3", "dout_sclk_spi3",
357 GATE(CLK_SCLK_SPI2, "sclk_spi2", "dout_sclk_spi2",
359 GATE(CLK_SCLK_UART3, "sclk_uart3", "dout_sclk_uart3",
361 GATE(CLK_SCLK_UART2, "sclk_uart2", "dout_sclk_uart2",
363 GATE(CLK_SCLK_UART1, "sclk_uart1", "dout_sclk_uart1",
365 GATE(CLK_SCLK_UART0, "sclk_uart0", "dout_sclk_uart0",
367 GATE(CLK_SCLK_SPI4, "sclk_spi4", "dout_sclk_spi4",
521 GATE(CLK_SCLK_MMC2, "sclk_mmc2", "dout_sclk_mmc2",
523 GATE(0, "sclk_usbdrd300", "dout_sclk_usbdrd300",
526 GATE(CLK_SCLK_PHY_FSYS1, "sclk_phy_fsys1", "dout_sclk_phy_fsys1",
529 GATE(CLK_SCLK_UFSUNIPRO20, "sclk_ufsunipro20", "dout_sclk_ufsunipro20",
532 GATE(CLK_SCLK_MMC1, "sclk_mmc1", "dout_sclk_mmc1",
534 GATE(CLK_SCLK_MMC0, "sclk_mmc0", "dout_sclk_mmc0",
537 GATE(CLK_ACLK_FSYS0_200, "aclk_fsys0_200", "dout_aclk_fsys0_200",
540 GATE(CLK_ACLK_FSYS1_200, "aclk_fsys1_200", "dout_aclk_fsys1_200",
543 GATE(CLK_SCLK_PHY_FSYS1_26M, "sclk_phy_fsys1_26m",
602 GATE(PCLK_RTC, "pclk_rtc", "mout_aclk_ccore_133_user",
647 GATE(PCLK_HSI2C0, "pclk_hsi2c0", "mout_aclk_peric0_66_user",
649 GATE(PCLK_HSI2C1, "pclk_hsi2c1", "mout_aclk_peric0_66_user",
651 GATE(PCLK_HSI2C4, "pclk_hsi2c4", "mout_aclk_peric0_66_user",
653 GATE(PCLK_HSI2C5, "pclk_hsi2c5", "mout_aclk_peric0_66_user",
655 GATE(PCLK_HSI2C9, "pclk_hsi2c9", "mout_aclk_peric0_66_user",
657 GATE(PCLK_HSI2C10, "pclk_hsi2c10", "mout_aclk_peric0_66_user",
659 GATE(PCLK_HSI2C11, "pclk_hsi2c11", "mout_aclk_peric0_66_user",
661 GATE(PCLK_UART0, "pclk_uart0", "mout_aclk_peric0_66_user",
663 GATE(PCLK_ADCIF, "pclk_adcif", "mout_aclk_peric0_66_user",
665 GATE(PCLK_PWM, "pclk_pwm", "mout_aclk_peric0_66_user",
668 GATE(SCLK_UART0, "sclk_uart0_user", "mout_sclk_uart0_user",
670 GATE(SCLK_PWM, "sclk_pwm", "fin_pll", ENABLE_SCLK_PERIC0, 21, 0, 0),
740 GATE(PCLK_HSI2C2, "pclk_hsi2c2", "mout_aclk_peric1_66_user",
742 GATE(PCLK_HSI2C3, "pclk_hsi2c3", "mout_aclk_peric1_66_user",
744 GATE(PCLK_HSI2C6, "pclk_hsi2c6", "mout_aclk_peric1_66_user",
746 GATE(PCLK_HSI2C7, "pclk_hsi2c7", "mout_aclk_peric1_66_user",
748 GATE(PCLK_HSI2C8, "pclk_hsi2c8", "mout_aclk_peric1_66_user",
750 GATE(PCLK_UART1, "pclk_uart1", "mout_aclk_peric1_66_user",
752 GATE(PCLK_UART2, "pclk_uart2", "mout_aclk_peric1_66_user",
754 GATE(PCLK_UART3, "pclk_uart3", "mout_aclk_peric1_66_user",
756 GATE(PCLK_SPI0, "pclk_spi0", "mout_aclk_peric1_66_user",
758 GATE(PCLK_SPI1, "pclk_spi1", "mout_aclk_peric1_66_user",
760 GATE(PCLK_SPI2, "pclk_spi2", "mout_aclk_peric1_66_user",
762 GATE(PCLK_SPI3, "pclk_spi3", "mout_aclk_peric1_66_user",
764 GATE(PCLK_SPI4, "pclk_spi4", "mout_aclk_peric1_66_user",
766 GATE(PCLK_I2S1, "pclk_i2s1", "mout_aclk_peric1_66_user",
768 GATE(PCLK_PCM1, "pclk_pcm1", "mout_aclk_peric1_66_user",
770 GATE(PCLK_SPDIF, "pclk_spdif", "mout_aclk_peric1_66_user",
773 GATE(SCLK_UART1, "sclk_uart1_user", "mout_sclk_uart1_user",
775 GATE(SCLK_UART2, "sclk_uart2_user", "mout_sclk_uart2_user",
777 GATE(SCLK_UART3, "sclk_uart3_user", "mout_sclk_uart3_user",
779 GATE(SCLK_SPI0, "sclk_spi0_user", "mout_sclk_spi0_user",
781 GATE(SCLK_SPI1, "sclk_spi1_user", "mout_sclk_spi1_user",
783 GATE(SCLK_SPI2, "sclk_spi2_user", "mout_sclk_spi2_user",
785 GATE(SCLK_SPI3, "sclk_spi3_user", "mout_sclk_spi3_user",
787 GATE(SCLK_SPI4, "sclk_spi4_user", "mout_sclk_spi4_user",
789 GATE(SCLK_I2S1, "sclk_i2s1_user", "sclk_i2s1",
791 GATE(SCLK_PCM1, "sclk_pcm1_user", "sclk_pcm1",
793 GATE(SCLK_SPDIF, "sclk_spdif_user", "sclk_spdif",
839 GATE(PCLK_WDT, "pclk_wdt", "mout_aclk_peris_66_user",
841 GATE(PCLK_TMU, "pclk_tmu_apbif", "mout_aclk_peris_66_user",
844 GATE(PCLK_CHIPID, "pclk_chipid", "mout_aclk_peris_66_user",
846 GATE(SCLK_CHIPID, "sclk_chipid", "fin_pll",
849 GATE(SCLK_TMU, "sclk_tmu", "fin_pll", ENABLE_SCLK_PERIS, 10, 0, 0),
927 GATE(ACLK_PDMA1, "aclk_pdma1", "mout_aclk_fsys0_200_user",
929 GATE(ACLK_PDMA0, "aclk_pdma0", "mout_aclk_fsys0_200_user",
931 GATE(ACLK_AXIUS_USBDRD30X_FSYS0X, "aclk_axius_usbdrd30x_fsys0x",
935 GATE(ACLK_USBDRD300, "aclk_usbdrd300", "mout_aclk_fsys0_200_user",
937 GATE(ACLK_MMC2, "aclk_mmc2", "mout_aclk_fsys0_200_user",
940 GATE(SCLK_USBDRD300_SUSPENDCLK, "sclk_usbdrd300_suspendclk",
943 GATE(SCLK_USBDRD300_REFCLK, "sclk_usbdrd300_refclk", "fin_pll",
946 GATE(PHYCLK_USBDRD300_UDRD30_PIPE_PCLK_USER,
950 GATE(PHYCLK_USBDRD300_UDRD30_PHYCLK_USER,
955 GATE(OSCCLK_PHY_CLKOUT_USB30_PHY, "oscclk_phy_clkout_usb30_phy",
1055 GATE(SCLK_UFSUNIPRO20_USER, "sclk_ufsunipro20_user",
1059 GATE(ACLK_MMC1, "aclk_mmc1", "mout_aclk_fsys1_200_user",
1061 GATE(ACLK_MMC0, "aclk_mmc0", "mout_aclk_fsys1_200_user",
1064 GATE(ACLK_UFS20_LINK, "aclk_ufs20_link", "dout_pclk_fsys1",
1066 GATE(PCLK_GPIO_FSYS1, "pclk_gpio_fsys1", "mout_aclk_fsys1_200_user",
1069 GATE(PHYCLK_UFS20_RX1_SYMBOL_USER, "phyclk_ufs20_rx1_symbol_user",
1072 GATE(PHYCLK_UFS20_RX0_SYMBOL_USER, "phyclk_ufs20_rx0_symbol_user",
1075 GATE(PHYCLK_UFS20_TX0_SYMBOL_USER, "phyclk_ufs20_tx0_symbol_user",
1079 GATE(OSCCLK_PHY_CLKOUT_EMBEDDED_COMBO_PHY,
1084 GATE(SCLK_COMBO_PHY_EMBEDDED_26M, "sclk_combo_phy_embedded_26m",
1136 GATE(ACLK_MSCL_0, "aclk_mscl_0", "usermux_aclk_mscl_532",
1138 GATE(ACLK_MSCL_1, "aclk_mscl_1", "usermux_aclk_mscl_532",
1140 GATE(ACLK_JPEG, "aclk_jpeg", "usermux_aclk_mscl_532",
1142 GATE(ACLK_G2D, "aclk_g2d", "usermux_aclk_mscl_532",
1144 GATE(ACLK_LH_ASYNC_SI_MSCL_0, "aclk_lh_async_si_mscl_0",
1147 GATE(ACLK_LH_ASYNC_SI_MSCL_1, "aclk_lh_async_si_mscl_1",
1150 GATE(ACLK_XIU_MSCLX_0, "aclk_xiu_msclx_0", "usermux_aclk_mscl_532",
1152 GATE(ACLK_XIU_MSCLX_1, "aclk_xiu_msclx_1", "usermux_aclk_mscl_532",
1154 GATE(ACLK_AXI2ACEL_BRIDGE, "aclk_axi2acel_bridge",
1157 GATE(ACLK_QE_MSCL_0, "aclk_qe_mscl_0", "usermux_aclk_mscl_532",
1159 GATE(ACLK_QE_MSCL_1, "aclk_qe_mscl_1", "usermux_aclk_mscl_532",
1161 GATE(ACLK_QE_JPEG, "aclk_qe_jpeg", "usermux_aclk_mscl_532",
1163 GATE(ACLK_QE_G2D, "aclk_qe_g2d", "usermux_aclk_mscl_532",
1165 GATE(ACLK_PPMU_MSCL_0, "aclk_ppmu_mscl_0", "usermux_aclk_mscl_532",
1167 GATE(ACLK_PPMU_MSCL_1, "aclk_ppmu_mscl_1", "usermux_aclk_mscl_532",
1169 GATE(ACLK_MSCLNP_133, "aclk_msclnp_133", "usermux_aclk_mscl_532",
1171 GATE(ACLK_AHB2APB_MSCL0P, "aclk_ahb2apb_mscl0p",
1174 GATE(ACLK_AHB2APB_MSCL1P, "aclk_ahb2apb_mscl1p",
1178 GATE(PCLK_MSCL_0, "pclk_mscl_0", "dout_pclk_mscl",
1180 GATE(PCLK_MSCL_1, "pclk_mscl_1", "dout_pclk_mscl",
1182 GATE(PCLK_JPEG, "pclk_jpeg", "dout_pclk_mscl",
1184 GATE(PCLK_G2D, "pclk_g2d", "dout_pclk_mscl",
1186 GATE(PCLK_QE_MSCL_0, "pclk_qe_mscl_0", "dout_pclk_mscl",
1188 GATE(PCLK_QE_MSCL_1, "pclk_qe_mscl_1", "dout_pclk_mscl",
1190 GATE(PCLK_QE_JPEG, "pclk_qe_jpeg", "dout_pclk_mscl",
1192 GATE(PCLK_QE_G2D, "pclk_qe_g2d", "dout_pclk_mscl",
1194 GATE(PCLK_PPMU_MSCL_0, "pclk_ppmu_mscl_0", "dout_pclk_mscl",
1196 GATE(PCLK_PPMU_MSCL_1, "pclk_ppmu_mscl_1", "dout_pclk_mscl",
1198 GATE(PCLK_AXI2ACEL_BRIDGE, "pclk_axi2acel_bridge", "dout_pclk_mscl",
1200 GATE(PCLK_PMU_MSCL, "pclk_pmu_mscl", "dout_pclk_mscl",
1266 GATE(SCLK_PCM, "sclk_pcm", "dout_sclk_pcm",
1268 GATE(SCLK_I2S, "sclk_i2s", "dout_sclk_i2s",
1270 GATE(0, "sclk_uart", "dout_sclk_uart", ENABLE_SCLK_AUD, 29, 0, 0),
1271 GATE(0, "sclk_slimbus", "dout_sclk_slimbus",
1274 GATE(0, "pclk_dbg_aud", "dout_aud_pclk_dbg", ENABLE_PCLK_AUD, 19, 0, 0),
1275 GATE(0, "pclk_gpio_aud", "dout_aclk_aud", ENABLE_PCLK_AUD, 20, 0, 0),
1276 GATE(0, "pclk_wdt1", "dout_aclk_aud", ENABLE_PCLK_AUD, 22, 0, 0),
1277 GATE(0, "pclk_wdt0", "dout_aclk_aud", ENABLE_PCLK_AUD, 23, 0, 0),
1278 GATE(0, "pclk_slimbus", "dout_aclk_aud", ENABLE_PCLK_AUD, 24, 0, 0),
1279 GATE(0, "pclk_uart", "dout_aclk_aud", ENABLE_PCLK_AUD, 25, 0, 0),
1280 GATE(PCLK_PCM, "pclk_pcm", "dout_aclk_aud",
1282 GATE(PCLK_I2S, "pclk_i2s", "dout_aclk_aud",
1284 GATE(0, "pclk_timer", "dout_aclk_aud", ENABLE_PCLK_AUD, 28, 0, 0),
1285 GATE(0, "pclk_smmu_aud", "dout_aclk_aud", ENABLE_PCLK_AUD, 31, 0, 0),
1287 GATE(0, "aclk_smmu_aud", "dout_aclk_aud", ENABLE_ACLK_AUD, 27, 0, 0),
1288 GATE(0, "aclk_acel_lh_async_si_top", "dout_aclk_aud",
1290 GATE(ACLK_ADMA, "aclk_dmac", "dout_aclk_aud", ENABLE_ACLK_AUD, 31, 0, 0),