Lines Matching full:composite

270 	COMPOSITE(SCLK_RTC32K, "clk_rtc32k", mux_2plls_xin24m_p, 0,
308 COMPOSITE(0, "aclk_gpu_pre", mux_4plls_p, 0,
317 COMPOSITE(0, "clk_ddr", mux_ddrphy_p, CLK_IGNORE_UNUSED,
329 COMPOSITE(PCLK_DDR, "pclk_ddr", mux_2plls_hdmiphy_p, 0,
348 COMPOSITE(ACLK_BUS_PRE, "aclk_bus_pre", mux_2plls_hdmiphy_p, 0,
362 COMPOSITE(SCLK_TSP, "clk_tsp", mux_2plls_p, 0,
369 COMPOSITE(0, "clk_i2s0_div", mux_2plls_p, 0,
379 COMPOSITE(0, "clk_i2s1_div", mux_2plls_p, 0,
392 COMPOSITE(0, "clk_i2s2_div", mux_2plls_p, 0,
405 COMPOSITE(0, "clk_spdif_div", mux_2plls_p, 0,
414 COMPOSITE(0, "clk_uart0_div", mux_2plls_u480m_p, 0,
417 COMPOSITE(0, "clk_uart1_div", mux_2plls_u480m_p, 0,
420 COMPOSITE(0, "clk_uart2_div", mux_2plls_u480m_p, 0,
440 COMPOSITE(SCLK_I2C0, "clk_i2c0", mux_2plls_p, 0,
443 COMPOSITE(SCLK_I2C1, "clk_i2c1", mux_2plls_p, 0,
446 COMPOSITE(SCLK_I2C2, "clk_i2c2", mux_2plls_p, 0,
449 COMPOSITE(SCLK_I2C3, "clk_i2c3", mux_2plls_p, 0,
452 COMPOSITE(SCLK_CRYPTO, "clk_crypto", mux_2plls_p, 0,
461 COMPOSITE(SCLK_SPI, "clk_spi", mux_2plls_p, 0,
464 COMPOSITE(SCLK_PWM, "clk_pwm", mux_2plls_p, 0,
467 COMPOSITE(SCLK_OTP, "clk_otp", mux_2plls_xin24m_p, 0,
470 COMPOSITE(SCLK_EFUSE, "clk_efuse", mux_2plls_xin24m_p, 0,
473COMPOSITE(SCLK_PDM, "clk_pdm", mux_cpll_gpll_apll_p, CLK_SET_RATE_NO_REPARENT | CLK_SET_RATE_PAREN…
490 COMPOSITE(SCLK_WIFI, "clk_wifi", mux_2plls_u480m_p, 0,
499 COMPOSITE(ACLK_RKVDEC_PRE, "aclk_rkvdec_pre", mux_4plls_p, 0,
513 COMPOSITE(SCLK_VDEC_CABAC, "sclk_vdec_cabac", mux_4plls_p, 0,
517 COMPOSITE(SCLK_VDEC_CORE, "sclk_vdec_core", mux_4plls_p, 0,
521 COMPOSITE(ACLK_VPU_PRE, "aclk_vpu_pre", mux_4plls_p, 0,
535 COMPOSITE(ACLK_RKVENC, "aclk_rkvenc", mux_4plls_p, 0,
555 COMPOSITE(SCLK_VENC_CORE, "sclk_venc_core", mux_4plls_p, 0,
559 COMPOSITE(SCLK_VENC_DSP, "sclk_venc_dsp", mux_4plls_p, 0,
568 COMPOSITE(ACLK_VIO_PRE, "aclk_vio_pre", mux_4plls_p, 0,
574 COMPOSITE(ACLK_RGA_PRE, "aclk_rga_pre", mux_4plls_p, 0,
577 COMPOSITE(SCLK_RGA, "clk_rga", mux_4plls_p, 0,
580 COMPOSITE(ACLK_VOP_PRE, "aclk_vop_pre", mux_4plls_p, 0,
592 COMPOSITE(DCLK_LCDC_SRC, "dclk_lcdc_src", mux_gpll_cpll_p, 0,
622 COMPOSITE(SCLK_SDMMC, "clk_sdmmc", mux_2plls_24m_u480m_p, 0,
626 COMPOSITE(SCLK_SDIO, "clk_sdio", mux_2plls_24m_u480m_p, 0,
630 COMPOSITE(SCLK_EMMC, "clk_emmc", mux_2plls_24m_u480m_p, 0,
634 COMPOSITE(SCLK_SDMMC_EXT, "clk_sdmmc_ext", mux_2plls_24m_u480m_p, 0,
638 COMPOSITE(SCLK_REF_USB3OTG_SRC, "clk_ref_usb3otg_src", mux_2plls_p, 0,
648 COMPOSITE(SCLK_USB3OTG_SUSPEND, "clk_usb3otg_suspend", mux_xin24m_32k_p, 0,
657 COMPOSITE(ACLK_GMAC, "aclk_gmac", mux_2plls_hdmiphy_p, 0,
664 COMPOSITE(SCLK_MAC2IO_SRC, "clk_mac2io_src", mux_2plls_p, 0,
675 COMPOSITE(SCLK_MAC2IO_OUT, "clk_mac2io_out", mux_2plls_p, 0,
683 COMPOSITE(SCLK_MAC2PHY_SRC, "clk_mac2phy_src", mux_2plls_p, 0,