Lines Matching +full:0 +full:x48
27 .l_reg = 0x4,
28 .m_reg = 0x8,
29 .n_reg = 0xc,
30 .config_reg = 0x14,
31 .mode_reg = 0x0,
32 .status_reg = 0x18,
43 .l = 0xf,
44 .m = 0x91,
45 .n = 0xc7,
46 .vco_val = 0x0,
48 .pre_div_val = 0x0,
50 .post_div_val = 0x0,
62 { P_PXO, 0 },
109 .ns_reg = 0x48,
110 .md_reg = 0x4c,
124 .src_sel_shift = 0,
129 .enable_reg = 0x48,
146 .halt_reg = 0x50,
150 .enable_reg = 0x48,
163 .reg = 0x48,
177 .halt_reg = 0x50,
178 .halt_bit = 0,
181 .enable_reg = 0x48,
195 .reg = 0x48,
223 .ns_reg = 0x54,
224 .md_reg = 0x58,
238 .src_sel_shift = 0,
243 .enable_reg = 0x54,
256 .halt_reg = 0x5c,
257 .halt_bit = 0,
260 .enable_reg = 0x54,
273 .reg = 0x54,
303 .ns_reg = 0xcc,
304 .md_reg = 0xd0,
318 .src_sel_shift = 0,
323 .enable_reg = 0xcc,
340 .halt_reg = 0xd4,
344 .enable_reg = 0xcc,
362 .ns_reg = 0x38,
363 .md_reg = 0x3c,
377 .src_sel_shift = 0,
382 .enable_reg = 0x38,
412 .max_register = 0xfc,
438 regmap_read(regmap, 0x0, &val); in lcc_ipq806x_probe()
442 regmap_write(regmap, 0xc4, 0x1); in lcc_ipq806x_probe()