9 #include <linux/regmap.h>
169 	ret = regmap_read(pll->clkr.regmap, PLL_MODE(pll), &val);  in wait_for_pll()
174 		ret = regmap_read(pll->clkr.regmap, PLL_MODE(pll), &val);  in wait_for_pll()
210 void clk_alpha_pll_configure(struct clk_alpha_pll *pll, struct regmap *regmap,  in clk_alpha_pll_configure()  argument
215 	regmap_write(regmap, PLL_L_VAL(pll), config->l);  in clk_alpha_pll_configure()
216 	regmap_write(regmap, PLL_ALPHA_VAL(pll), config->alpha);  in clk_alpha_pll_configure()
217 	regmap_write(regmap, PLL_CONFIG_CTL(pll), config->config_ctl_val);  in clk_alpha_pll_configure()
220 		regmap_write(regmap, PLL_CONFIG_CTL_U(pll),  in clk_alpha_pll_configure()
224 		regmap_write(regmap, PLL_ALPHA_VAL_U(pll), config->alpha_hi);  in clk_alpha_pll_configure()
244 	regmap_update_bits(regmap, PLL_USER_CTL(pll), mask, val);  in clk_alpha_pll_configure()
247 		qcom_pll_set_fsm_mode(regmap, PLL_MODE(pll), 6, 0);  in clk_alpha_pll_configure()
257 	ret = regmap_read(pll->clkr.regmap, PLL_MODE(pll), &val);  in clk_alpha_pll_hwfsm_enable()
266 	ret = regmap_write(pll->clkr.regmap, PLL_MODE(pll), val);  in clk_alpha_pll_hwfsm_enable()
282 	ret = regmap_read(pll->clkr.regmap, PLL_MODE(pll), &val);  in clk_alpha_pll_hwfsm_disable()
287 		ret = regmap_update_bits(pll->clkr.regmap, PLL_MODE(pll),  in clk_alpha_pll_hwfsm_disable()
298 	ret = regmap_update_bits(pll->clkr.regmap, PLL_MODE(pll),  in clk_alpha_pll_hwfsm_disable()
312 	ret = regmap_read(pll->clkr.regmap, PLL_MODE(pll), &val);  in pll_is_enabled()
336 	ret = regmap_read(pll->clkr.regmap, PLL_MODE(pll), &val);  in clk_alpha_pll_enable()
352 	ret = regmap_update_bits(pll->clkr.regmap, PLL_MODE(pll),  in clk_alpha_pll_enable()
364 	ret = regmap_update_bits(pll->clkr.regmap, PLL_MODE(pll),  in clk_alpha_pll_enable()
373 	ret = regmap_update_bits(pll->clkr.regmap, PLL_MODE(pll),  in clk_alpha_pll_enable()
387 	ret = regmap_read(pll->clkr.regmap, PLL_MODE(pll), &val);  in clk_alpha_pll_disable()
398 	regmap_update_bits(pll->clkr.regmap, PLL_MODE(pll), mask, 0);  in clk_alpha_pll_disable()
405 	regmap_update_bits(pll->clkr.regmap, PLL_MODE(pll), mask, 0);  in clk_alpha_pll_disable()
463 	regmap_read(pll->clkr.regmap, PLL_L_VAL(pll), &l);  in clk_alpha_pll_recalc_rate()
465 	regmap_read(pll->clkr.regmap, PLL_USER_CTL(pll), &ctl);  in clk_alpha_pll_recalc_rate()
467 		regmap_read(pll->clkr.regmap, PLL_ALPHA_VAL(pll), &low);  in clk_alpha_pll_recalc_rate()
469 			regmap_read(pll->clkr.regmap, PLL_ALPHA_VAL_U(pll),  in clk_alpha_pll_recalc_rate()
489 	regmap_read(pll->clkr.regmap, PLL_MODE(pll), &mode);  in __clk_alpha_pll_update_latch()
492 	regmap_update_bits(pll->clkr.regmap, PLL_MODE(pll), PLL_UPDATE,  in __clk_alpha_pll_update_latch()
510 		regmap_update_bits(pll->clkr.regmap, PLL_MODE(pll), PLL_UPDATE, 0);  in __clk_alpha_pll_update_latch()
554 	regmap_write(pll->clkr.regmap, PLL_L_VAL(pll), l);  in __clk_alpha_pll_set_rate()
560 		regmap_write(pll->clkr.regmap, PLL_ALPHA_VAL_U(pll), a >> 32);  in __clk_alpha_pll_set_rate()
562 	regmap_write(pll->clkr.regmap, PLL_ALPHA_VAL(pll), a);  in __clk_alpha_pll_set_rate()
565 		regmap_update_bits(pll->clkr.regmap, PLL_USER_CTL(pll),  in __clk_alpha_pll_set_rate()
570 	regmap_update_bits(pll->clkr.regmap, PLL_USER_CTL(pll),  in __clk_alpha_pll_set_rate()
662 	regmap_read(pll->clkr.regmap, PLL_L_VAL(pll), &l);  in alpha_pll_huayra_recalc_rate()
663 	regmap_read(pll->clkr.regmap, PLL_USER_CTL(pll), &ctl);  in alpha_pll_huayra_recalc_rate()
666 		regmap_read(pll->clkr.regmap, PLL_ALPHA_VAL(pll), &alpha);  in alpha_pll_huayra_recalc_rate()
717 	regmap_read(pll->clkr.regmap, PLL_USER_CTL(pll), &ctl);  in alpha_pll_huayra_set_rate()
720 		regmap_read(pll->clkr.regmap, PLL_ALPHA_VAL(pll), &cur_alpha);  in alpha_pll_huayra_set_rate()
733 		regmap_write(pll->clkr.regmap, PLL_L_VAL(pll), l);  in alpha_pll_huayra_set_rate()
739 	regmap_write(pll->clkr.regmap, PLL_L_VAL(pll), l);  in alpha_pll_huayra_set_rate()
740 	regmap_write(pll->clkr.regmap, PLL_ALPHA_VAL(pll), a);  in alpha_pll_huayra_set_rate()
743 		regmap_update_bits(pll->clkr.regmap, PLL_USER_CTL(pll),  in alpha_pll_huayra_set_rate()
746 		regmap_update_bits(pll->clkr.regmap, PLL_USER_CTL(pll),  in alpha_pll_huayra_set_rate()
761 				struct regmap *regmap)  in trion_pll_is_enabled()  argument
766 	ret = regmap_read(regmap, PLL_MODE(pll), &mode_regval);  in trion_pll_is_enabled()
767 	ret |= regmap_read(regmap, PLL_OPMODE(pll), &opmode_regval);  in trion_pll_is_enabled()
778 	return trion_pll_is_enabled(pll, pll->clkr.regmap);  in clk_trion_pll_is_enabled()
784 	struct regmap *regmap = pll->clkr.regmap;  in clk_trion_pll_enable()  local
788 	ret = regmap_read(regmap, PLL_MODE(pll), &val);  in clk_trion_pll_enable()
801 	regmap_write(regmap, PLL_OPMODE(pll), PLL_RUN);  in clk_trion_pll_enable()
808 	ret = regmap_update_bits(regmap, PLL_USER_CTL(pll),  in clk_trion_pll_enable()
814 	return regmap_update_bits(regmap, PLL_MODE(pll),  in clk_trion_pll_enable()
821 	struct regmap *regmap = pll->clkr.regmap;  in clk_trion_pll_disable()  local
825 	ret = regmap_read(regmap, PLL_MODE(pll), &val);  in clk_trion_pll_disable()
836 	ret = regmap_update_bits(regmap, PLL_MODE(pll), PLL_OUTCTRL, 0);  in clk_trion_pll_disable()
841 	ret = regmap_update_bits(regmap, PLL_USER_CTL(pll),  in clk_trion_pll_disable()
847 	regmap_write(regmap, PLL_OPMODE(pll), PLL_STANDBY);  in clk_trion_pll_disable()
848 	regmap_update_bits(regmap, PLL_MODE(pll), PLL_RESET_N, PLL_RESET_N);  in clk_trion_pll_disable()
857 	regmap_read(pll->clkr.regmap, PLL_L_VAL(pll), &l);  in clk_trion_pll_recalc_rate()
858 	regmap_read(pll->clkr.regmap, PLL_ALPHA_VAL(pll), &frac);  in clk_trion_pll_recalc_rate()
916 	regmap_read(pll->clkr.regmap, PLL_USER_CTL(pll), &ctl);  in clk_alpha_pll_postdiv_recalc_rate()
963 	regmap_read(pll->clkr.regmap, PLL_USER_CTL(pll), &ctl);  in clk_alpha_pll_postdiv_round_ro_rate()
984 	return regmap_update_bits(pll->clkr.regmap, PLL_USER_CTL(pll),  in clk_alpha_pll_postdiv_set_rate()
1002 void clk_fabia_pll_configure(struct clk_alpha_pll *pll, struct regmap *regmap,  in clk_fabia_pll_configure()  argument
1008 		regmap_write(regmap, PLL_L_VAL(pll), config->l);  in clk_fabia_pll_configure()
1011 		regmap_write(regmap, PLL_FRAC(pll), config->alpha);  in clk_fabia_pll_configure()
1014 		regmap_write(regmap, PLL_CONFIG_CTL(pll),  in clk_fabia_pll_configure()
1018 		regmap_write(regmap, PLL_CONFIG_CTL_U(pll),  in clk_fabia_pll_configure()
1022 		regmap_write(regmap, PLL_USER_CTL(pll), config->user_ctl_val);  in clk_fabia_pll_configure()
1025 		regmap_write(regmap, PLL_USER_CTL_U(pll),  in clk_fabia_pll_configure()
1029 		regmap_write(regmap, PLL_TEST_CTL(pll),  in clk_fabia_pll_configure()
1033 		regmap_write(regmap, PLL_TEST_CTL_U(pll),  in clk_fabia_pll_configure()
1039 		regmap_update_bits(regmap, PLL_USER_CTL(pll), mask, val);  in clk_fabia_pll_configure()
1042 	regmap_update_bits(regmap, PLL_MODE(pll), PLL_UPDATE_BYPASS,  in clk_fabia_pll_configure()
1045 	regmap_update_bits(regmap, PLL_MODE(pll), PLL_RESET_N, PLL_RESET_N);  in clk_fabia_pll_configure()
1054 	struct regmap *regmap = pll->clkr.regmap;  in alpha_pll_fabia_enable()  local
1056 	ret = regmap_read(regmap, PLL_MODE(pll), &val);  in alpha_pll_fabia_enable()
1068 	ret = regmap_read(regmap, PLL_OPMODE(pll), &opmode_val);  in alpha_pll_fabia_enable()
1076 	ret = regmap_update_bits(regmap, PLL_MODE(pll), PLL_OUTCTRL, 0);  in alpha_pll_fabia_enable()
1080 	ret = regmap_write(regmap, PLL_OPMODE(pll), PLL_STANDBY);  in alpha_pll_fabia_enable()
1084 	ret = regmap_update_bits(regmap, PLL_MODE(pll), PLL_RESET_N,  in alpha_pll_fabia_enable()
1089 	ret = regmap_write(regmap, PLL_OPMODE(pll), PLL_RUN);  in alpha_pll_fabia_enable()
1097 	ret = regmap_update_bits(regmap, PLL_USER_CTL(pll),  in alpha_pll_fabia_enable()
1102 	return regmap_update_bits(regmap, PLL_MODE(pll), PLL_OUTCTRL,  in alpha_pll_fabia_enable()
1111 	struct regmap *regmap = pll->clkr.regmap;  in alpha_pll_fabia_disable()  local
1113 	ret = regmap_read(regmap, PLL_MODE(pll), &val);  in alpha_pll_fabia_disable()
1123 	ret = regmap_update_bits(regmap, PLL_MODE(pll), PLL_OUTCTRL, 0);  in alpha_pll_fabia_disable()
1128 	ret = regmap_update_bits(regmap, PLL_USER_CTL(pll), PLL_OUT_MASK, 0);  in alpha_pll_fabia_disable()
1133 	regmap_write(regmap, PLL_OPMODE(pll), PLL_STANDBY);  in alpha_pll_fabia_disable()
1142 	regmap_read(pll->clkr.regmap, PLL_L_VAL(pll), &l);  in alpha_pll_fabia_recalc_rate()
1143 	regmap_read(pll->clkr.regmap, PLL_FRAC(pll), &frac);  in alpha_pll_fabia_recalc_rate()
1168 	regmap_write(pll->clkr.regmap, PLL_L_VAL(pll), l);  in alpha_pll_fabia_set_rate()
1169 	regmap_write(pll->clkr.regmap, PLL_FRAC(pll), a);  in alpha_pll_fabia_set_rate()
1186 	ret = regmap_read(pll->clkr.regmap, PLL_MODE(pll), &val);  in alpha_pll_fabia_prepare()
1217 	regmap_write(pll->clkr.regmap, PLL_ALPHA_VAL(pll), cal_l);  in alpha_pll_fabia_prepare()
1258 	ret = regmap_read(pll->clkr.regmap, PLL_USER_CTL(pll), &val);  in clk_alpha_pll_postdiv_fabia_recalc_rate()
1279 	struct regmap *regmap = pll->clkr.regmap;  in clk_trion_pll_postdiv_recalc_rate()  local
1282 	regmap_read(regmap, PLL_USER_CTL(pll), &val);  in clk_trion_pll_postdiv_recalc_rate()
1312 	struct regmap *regmap = pll->clkr.regmap;  in clk_trion_pll_postdiv_set_rate()  local
1323 	return regmap_update_bits(regmap, PLL_USER_CTL(pll),  in clk_trion_pll_postdiv_set_rate()
1354 	ret = regmap_read(pll->clkr.regmap, PLL_MODE(pll), &val);  in clk_alpha_pll_postdiv_fabia_set_rate()
1369 	return regmap_update_bits(pll->clkr.regmap, PLL_USER_CTL(pll),  in clk_alpha_pll_postdiv_fabia_set_rate()
1385  * @regmap: register map
1388 void clk_trion_pll_configure(struct clk_alpha_pll *pll, struct regmap *regmap,  in clk_trion_pll_configure()  argument
1392 		regmap_write(regmap, PLL_L_VAL(pll), config->l);  in clk_trion_pll_configure()
1394 	regmap_write(regmap, PLL_CAL_L_VAL(pll), TRION_PLL_CAL_VAL);  in clk_trion_pll_configure()
1397 		regmap_write(regmap, PLL_ALPHA_VAL(pll), config->alpha);  in clk_trion_pll_configure()
1400 		regmap_write(regmap, PLL_CONFIG_CTL(pll),  in clk_trion_pll_configure()
1404 		regmap_write(regmap, PLL_CONFIG_CTL_U(pll),  in clk_trion_pll_configure()
1408 		regmap_write(regmap, PLL_CONFIG_CTL_U1(pll),  in clk_trion_pll_configure()
1412 		regmap_write(regmap, PLL_USER_CTL(pll),  in clk_trion_pll_configure()
1416 		regmap_write(regmap, PLL_USER_CTL_U(pll),  in clk_trion_pll_configure()
1420 		regmap_write(regmap, PLL_USER_CTL_U1(pll),  in clk_trion_pll_configure()
1424 		regmap_write(regmap, PLL_TEST_CTL(pll),  in clk_trion_pll_configure()
1428 		regmap_write(regmap, PLL_TEST_CTL_U(pll),  in clk_trion_pll_configure()
1432 		regmap_write(regmap, PLL_TEST_CTL_U1(pll),  in clk_trion_pll_configure()
1435 	regmap_update_bits(regmap, PLL_MODE(pll), PLL_UPDATE_BYPASS,  in clk_trion_pll_configure()
1439 	regmap_update_bits(regmap, PLL_MODE(pll),  PLL_OUTCTRL, 0);  in clk_trion_pll_configure()
1442 	regmap_write(regmap, PLL_OPMODE(pll), PLL_STANDBY);  in clk_trion_pll_configure()
1445 	regmap_update_bits(regmap, PLL_MODE(pll), PLL_RESET_N, PLL_RESET_N);  in clk_trion_pll_configure()
1460 	regmap_read(pll->clkr.regmap, PLL_STATUS(pll), &regval);  in __alpha_pll_trion_prepare()
1502 	regmap_write(pll->clkr.regmap, PLL_L_VAL(pll), l);  in alpha_pll_trion_set_rate()
1503 	regmap_write(pll->clkr.regmap, PLL_ALPHA_VAL(pll), a);  in alpha_pll_trion_set_rate()
1506 	ret = regmap_update_bits(pll->clkr.regmap, PLL_MODE(pll),  in alpha_pll_trion_set_rate()
1513 	regmap_read(pll->clkr.regmap, PLL_MODE(pll), &regval);  in alpha_pll_trion_set_rate()
1520 	ret = regmap_update_bits(pll->clkr.regmap, PLL_MODE(pll),  in alpha_pll_trion_set_rate()