1 // SPDX-License-Identifier: GPL-2.0
14  *        +--------------------------------+
16  *        |             +--+               |
17  *  in >>-----[ /N ]--->|  |      +-----+  |
18  *        |             |  |------| DCO |---->> out
19  *        |  +--------->|  |      +--v--+  |
20  *        |  |          +--+         |     |
22  *        |  +--[ *(M + (F/Fmax) ]<--+     |
24  *        +--------------------------------+
29 #include <linux/clk-provider.h>
37 #include "clk-regmap.h"
38 #include "clk-pll.h"
43 	return (struct meson_clk_pll_data *)clk->data;  in meson_clk_pll_data()
48 	if ((pll->flags & CLK_MESON_PLL_ROUND_CLOSEST) &&  in __pll_round_closest_mult()
49 	    !MESON_PARM_APPLICABLE(&pll->frac))  in __pll_round_closest_mult()
62 	if (frac && MESON_PARM_APPLICABLE(&pll->frac)) {  in __pll_params_to_rate()
66 					 (1 << pll->frac.width));  in __pll_params_to_rate()
79 	n = meson_parm_read(clk->map, &pll->n);  in meson_clk_pll_recalc_rate()
89 	m = meson_parm_read(clk->map, &pll->m);  in meson_clk_pll_recalc_rate()
91 	frac = MESON_PARM_APPLICABLE(&pll->frac) ?  in meson_clk_pll_recalc_rate()
92 		meson_parm_read(clk->map, &pll->frac) :  in meson_clk_pll_recalc_rate()
104 	unsigned int frac_max = (1 << pll->frac.width);  in __pll_params_with_frac()
111 	if (pll->flags & CLK_MESON_PLL_ROUND_CLOSEST)  in __pll_params_with_frac()
116 	val -= m * frac_max;  in __pll_params_with_frac()
118 	return min((unsigned int)val, (frac_max - 1));  in __pll_params_with_frac()
128 		if (abs(now - rate) < abs(best - rate))  in meson_clk_pll_is_better()
144 	if (!pll->table[index].n)  in meson_clk_get_pll_table_index()
145 		return -EINVAL;  in meson_clk_get_pll_table_index()
147 	*m = pll->table[index].m;  in meson_clk_get_pll_table_index()
148 	*n = pll->table[index].n;  in meson_clk_get_pll_table_index()
175 	/* Check the predivider range */  in meson_clk_get_pll_range_index()
176 	if (*n >= (1 << pll->n.width))  in meson_clk_get_pll_range_index()
177 		return -EINVAL;  in meson_clk_get_pll_range_index()
181 		if (rate <= pll->range->min * parent_rate) {  in meson_clk_get_pll_range_index()
182 			*m = pll->range->min;  in meson_clk_get_pll_range_index()
183 			return -ENODATA;  in meson_clk_get_pll_range_index()
184 		} else if (rate >= pll->range->max * parent_rate) {  in meson_clk_get_pll_range_index()
185 			*m = pll->range->max;  in meson_clk_get_pll_range_index()
186 			return -ENODATA;  in meson_clk_get_pll_range_index()
192 	/* the pre-divider gives a multiplier too big - stop */  in meson_clk_get_pll_range_index()
193 	if (*m >= (1 << pll->m.width))  in meson_clk_get_pll_range_index()
194 		return -EINVAL;  in meson_clk_get_pll_range_index()
206 	if (pll->range)  in meson_clk_get_pll_get_index()
209 	else if (pll->table)  in meson_clk_get_pll_get_index()
212 	return -EINVAL;  in meson_clk_get_pll_get_index()
228 		if (ret == -EINVAL)  in meson_clk_get_pll_settings()
242 	return best ? 0 : -EINVAL;  in meson_clk_get_pll_settings()
260 	if (!MESON_PARM_APPLICABLE(&pll->frac) || rate == round)  in meson_clk_pll_round_rate()
280 		if (meson_parm_read(clk->map, &pll->l))  in meson_clk_pll_wait_lock()
283 		delay--;  in meson_clk_pll_wait_lock()
286 	return -ETIMEDOUT;  in meson_clk_pll_wait_lock()
294 	if (pll->init_count) {  in meson_clk_pll_init()
295 		meson_parm_write(clk->map, &pll->rst, 1);  in meson_clk_pll_init()
296 		regmap_multi_reg_write(clk->map, pll->init_regs,  in meson_clk_pll_init()
297 				       pll->init_count);  in meson_clk_pll_init()
298 		meson_parm_write(clk->map, &pll->rst, 0);  in meson_clk_pll_init()
309 	if (meson_parm_read(clk->map, &pll->rst) ||  in meson_clk_pll_is_enabled()
310 	    !meson_parm_read(clk->map, &pll->en) ||  in meson_clk_pll_is_enabled()
311 	    !meson_parm_read(clk->map, &pll->l))  in meson_clk_pll_is_enabled()
322 		return -EIO;  in meson_clk_pcie_pll_enable()
337 	meson_parm_write(clk->map, &pll->rst, 1);  in meson_clk_pll_enable()
340 	meson_parm_write(clk->map, &pll->en, 1);  in meson_clk_pll_enable()
343 	meson_parm_write(clk->map, &pll->rst, 0);  in meson_clk_pll_enable()
346 		return -EIO;  in meson_clk_pll_enable()
357 	meson_parm_write(clk->map, &pll->rst, 1);  in meson_clk_pll_disable()
360 	meson_parm_write(clk->map, &pll->en, 0);  in meson_clk_pll_disable()
372 		return -EINVAL;  in meson_clk_pll_set_rate()
380 	enabled = meson_parm_read(clk->map, &pll->en);  in meson_clk_pll_set_rate()
384 	meson_parm_write(clk->map, &pll->n, n);  in meson_clk_pll_set_rate()
385 	meson_parm_write(clk->map, &pll->m, m);  in meson_clk_pll_set_rate()
387 	if (MESON_PARM_APPLICABLE(&pll->frac)) {  in meson_clk_pll_set_rate()
389 		meson_parm_write(clk->map, &pll->frac, frac);  in meson_clk_pll_set_rate()
415  * To simplify, re-use the _init() op to enable the PLL and keep