70 #define clk_register_gate2(dev, name, parent_name, flags, reg, bit_idx, \  argument
78 #define imx_clk_pfd(name, parent_name, reg, idx) \  argument
81 #define imx_clk_gate_exclusive(name, parent, reg, shift, exclusive_mask) \  argument
90 #define imx_clk_divider(name, parent, reg, shift, width) \  argument
93 #define imx_clk_divider2(name, parent, reg, shift, width) \  argument
96 #define imx_clk_divider_flags(name, parent, reg, shift, width, flags) \  argument
99 #define imx_clk_gate(name, parent, reg, shift) \  argument
102 #define imx_clk_gate_dis(name, parent, reg, shift) \  argument
105 #define imx_clk_gate2(name, parent, reg, shift) \  argument
108 #define imx_clk_gate2_flags(name, parent, reg, shift, flags) \  argument
111 #define imx_clk_gate2_shared2(name, parent, reg, shift, share_count) \  argument
114 #define imx_clk_gate3(name, parent, reg, shift) \  argument
117 #define imx_clk_gate4(name, parent, reg, shift) \  argument
120 #define imx_clk_mux(name, reg, shift, width, parents, num_parents) \  argument
264 static inline struct clk_hw *imx_clk_hw_mux_ldb(const char *name, void __iomem *reg,  in imx_clk_hw_mux_ldb()
282 						void __iomem *reg, u8 shift,  in imx_clk_hw_divider()
291 						   void __iomem *reg, u8 shift,  in imx_clk_hw_divider_flags()
299 		void __iomem *reg, u8 shift, u8 width)  in imx_clk_hw_divider2()
307 		const char *parent, void __iomem *reg, u8 shift, u8 width,  in imx_clk_divider2_flags()
316 		void __iomem *reg, u8 shift, unsigned long flags)  in imx_clk_hw_gate_flags()
323 					     void __iomem *reg, u8 shift)  in imx_clk_hw_gate()
330 						const char *parent, void __iomem *reg, u8 shift)  in imx_dev_clk_hw_gate()
337 		void __iomem *reg, u8 shift)  in imx_clk_hw_gate_dis()
344 		void __iomem *reg, u8 shift, unsigned long flags)  in imx_clk_hw_gate_dis_flags()
351 		void __iomem *reg, u8 shift)  in imx_clk_hw_gate2()
358 		void __iomem *reg, u8 shift, unsigned long flags)  in imx_clk_hw_gate2_flags()
365 		const char *parent, void __iomem *reg, u8 shift,  in imx_clk_hw_gate2_shared()
373 		const char *parent, void __iomem *reg, u8 shift,  in imx_clk_hw_gate2_shared2()
383 				void __iomem *reg, u8 shift,  in imx_dev_clk_hw_gate_shared()
393 		const char *parent, void __iomem *reg, u8 shift, u8 cgr_val)  in imx_clk_gate2_cgr()
400 		void __iomem *reg, u8 shift)  in imx_clk_hw_gate3()
408 		const char *parent, void __iomem *reg, u8 shift,  in imx_clk_hw_gate3_flags()
416 #define imx_clk_gate3_flags(name, parent, reg, shift, flags) \  argument
420 		void __iomem *reg, u8 shift)  in imx_clk_hw_gate4()
428 		const char *parent, void __iomem *reg, u8 shift,  in imx_clk_hw_gate4_flags()
436 #define imx_clk_gate4_flags(name, parent, reg, shift, flags) \  argument
439 static inline struct clk_hw *imx_clk_hw_mux(const char *name, void __iomem *reg,  in imx_clk_hw_mux()
449 			const char *name, void __iomem *reg, u8 shift,  in imx_dev_clk_hw_mux()
457 static inline struct clk *imx_clk_mux2(const char *name, void __iomem *reg,  in imx_clk_mux2()
466 static inline struct clk_hw *imx_clk_hw_mux2(const char *name, void __iomem *reg,  in imx_clk_hw_mux2()
478 			void __iomem *reg, u8 shift, u8 width,  in imx_clk_mux_flags()
488 		void __iomem *reg, u8 shift, u8 width,  in imx_clk_hw_mux2_flags()
498 		void __iomem *reg, u8 shift, u8 width,  in imx_clk_mux2_flags()
508 						  void __iomem *reg, u8 shift,  in imx_clk_hw_mux_flags()
521 						  void __iomem *reg, u8 shift,  in imx_dev_clk_hw_mux_flags()
546 #define imx8m_clk_hw_composite_bus(name, parent_names, reg)	\  argument
552 #define imx8m_clk_hw_composite_bus_critical(name, parent_names, reg)	\  argument
557 #define imx8m_clk_hw_composite_core(name, parent_names, reg)	\  argument
563 #define imx8m_clk_composite_flags(name, parent_names, num_parents, reg, \  argument
568 #define __imx8m_clk_hw_composite(name, parent_names, reg, flags) \  argument
573 #define __imx8m_clk_composite(name, parent_names, reg, flags) \  argument
576 #define imx8m_clk_hw_composite(name, parent_names, reg) \  argument
579 #define imx8m_clk_composite(name, parent_names, reg) \  argument
582 #define imx8m_clk_hw_composite_critical(name, parent_names, reg) \  argument
585 #define imx8m_clk_composite_critical(name, parent_names, reg) \  argument