drivers/clk/clk-fsl-sai.c

1 // SPDX-License-Identifier: GPL-2.0
3  * Freescale SAI BCLK as a generic clock driver
10 #include <linux/clk-provider.h>
31 	struct device *dev = &pdev->dev;  in fsl_sai_clk_probe()
40 		return -ENOMEM;  in fsl_sai_clk_probe()
47 	spin_lock_init(&sai_clk->lock);  in fsl_sai_clk_probe()
49 	sai_clk->gate.reg = base + I2S_CSR;  in fsl_sai_clk_probe()
50 	sai_clk->gate.bit_idx = CSR_BCE_BIT;  in fsl_sai_clk_probe()
51 	sai_clk->gate.lock = &sai_clk->lock;  in fsl_sai_clk_probe()
53 	sai_clk->div.reg = base + I2S_CR2;  in fsl_sai_clk_probe()
54 	sai_clk->div.shift = CR2_DIV_SHIFT;  in fsl_sai_clk_probe()
55 	sai_clk->div.width = CR2_DIV_WIDTH;  in fsl_sai_clk_probe()
56 	sai_clk->div.lock = &sai_clk->lock;  in fsl_sai_clk_probe()
58 	/* set clock direction, we are the BCLK master */  in fsl_sai_clk_probe()
61 	hw = clk_hw_register_composite_pdata(dev, dev->of_node->name,  in fsl_sai_clk_probe()
63 					     &sai_clk->div.hw,  in fsl_sai_clk_probe()
65 					     &sai_clk->gate.hw,  in fsl_sai_clk_probe()
75 	{ .compatible = "fsl,vf610-sai-clock" },
83 		.name	= "fsl-sai-clk",
89 MODULE_DESCRIPTION("Freescale SAI bitclock-as-a-clock driver");
92 MODULE_ALIAS("platform:fsl-sai-clk");