1 // SPDX-License-Identifier: GPL-2.0
2 #include <linux/clk-provider.h>
31 	const char *name = np->name;  in of_sama5d2_clk_audio_pll_frac_setup()
48 	       "atmel,sama5d2-clk-audio-pll-frac",
54 	const char *name = np->name;  in of_sama5d2_clk_audio_pll_pad_setup()
71 	       "atmel,sama5d2-clk-audio-pll-pad",
77 	const char *name = np->name;  in of_sama5d2_clk_audio_pll_pmc_setup()
94 	       "atmel,sama5d2-clk-audio-pll-pmc",
148 		if (of_property_read_string(np, "clock-output-names", &name))  in of_sama5d2_clk_generated_setup()
149 			name = gcknp->name;  in of_sama5d2_clk_generated_setup()
151 		of_at91_get_clk_range(gcknp, "atmel,clk-output-range",  in of_sama5d2_clk_generated_setup()
154 		if (of_device_is_compatible(np, "atmel,sama5d2-clk-generated") &&  in of_sama5d2_clk_generated_setup()
170 CLK_OF_DECLARE(of_sama5d2_clk_generated_setup, "atmel,sama5d2-clk-generated",
178 	const char *name = np->name;  in of_sama5d4_clk_h32mx_setup()
194 CLK_OF_DECLARE(of_sama5d4_clk_h32mx_setup, "atmel,sama5d4-clk-h32mx",
210 	regmap_sfr = syscon_regmap_lookup_by_compatible("atmel,sama5d2-sfr");  in of_sama5d2_clk_i2s_mux_setup()
225 		hw = at91_clk_i2s_mux_register(regmap_sfr, i2s_mux_np->name,  in of_sama5d2_clk_i2s_mux_setup()
233 CLK_OF_DECLARE(sama5d2_clk_i2s_mux, "atmel,sama5d2-clk-i2s-mux",
240 	const char *name = np->name;  in of_at91rm9200_clk_main_osc_setup()
245 	of_property_read_string(np, "clock-output-names", &name);  in of_at91rm9200_clk_main_osc_setup()
246 	bypass = of_property_read_bool(np, "atmel,osc-bypass");  in of_at91rm9200_clk_main_osc_setup()
259 CLK_OF_DECLARE(at91rm9200_clk_main_osc, "atmel,at91rm9200-clk-main-osc",
266 	u32 accuracy = 0;  in of_at91sam9x5_clk_main_rc_osc_setup()  local
267 	const char *name = np->name;  in of_at91sam9x5_clk_main_rc_osc_setup()
270 	of_property_read_string(np, "clock-output-names", &name);  in of_at91sam9x5_clk_main_rc_osc_setup()
271 	of_property_read_u32(np, "clock-frequency", &frequency);  in of_at91sam9x5_clk_main_rc_osc_setup()
272 	of_property_read_u32(np, "clock-accuracy", &accuracy);  in of_at91sam9x5_clk_main_rc_osc_setup()
278 	hw = at91_clk_register_main_rc_osc(regmap, name, frequency, accuracy);  in of_at91sam9x5_clk_main_rc_osc_setup()
284 CLK_OF_DECLARE(at91sam9x5_clk_main_rc_osc, "atmel,at91sam9x5-clk-main-rc-osc",
291 	const char *name = np->name;  in of_at91rm9200_clk_main_setup()
295 	of_property_read_string(np, "clock-output-names", &name);  in of_at91rm9200_clk_main_setup()
307 CLK_OF_DECLARE(at91rm9200_clk_main, "atmel,at91rm9200-clk-main",
315 	const char *name = np->name;  in of_at91sam9x5_clk_main_setup()
327 	of_property_read_string(np, "clock-output-names", &name);  in of_at91sam9x5_clk_main_setup()
336 CLK_OF_DECLARE(at91sam9x5_clk_main, "atmel,at91sam9x5-clk-main",
348 	if (of_at91_get_clk_range(np, "atmel,clk-output-range", &characteristics->output))  in of_at91_clk_master_get_characteristics()
351 	of_property_read_u32_array(np, "atmel,clk-divisors",  in of_at91_clk_master_get_characteristics()
352 				   characteristics->divisors, 4);  in of_at91_clk_master_get_characteristics()
354 	characteristics->have_div3_pres =  in of_at91_clk_master_get_characteristics()
355 		of_property_read_bool(np, "atmel,master-clk-have-div3-pres");  in of_at91_clk_master_get_characteristics()
371 	const char *name = np->name;  in of_at91_clk_master_setup()
381 	of_property_read_string(np, "clock-output-names", &name);  in of_at91_clk_master_setup()
408 CLK_OF_DECLARE(at91rm9200_clk_master, "atmel,at91rm9200-clk-master",
415 CLK_OF_DECLARE(at91sam9x5_clk_master, "atmel,at91sam9x5-clk-master",
448 		if (of_property_read_string(np, "clock-output-names", &name))  in of_at91_clk_periph_setup()
449 			name = periphclknp->name;  in of_at91_clk_periph_setup()
458 					      "atmel,clk-output-range",  in of_at91_clk_periph_setup()
481 CLK_OF_DECLARE(at91rm9200_clk_periph, "atmel,at91rm9200-clk-peripheral",
488 CLK_OF_DECLARE(at91sam9x5_clk_periph, "atmel,at91sam9x5-clk-peripheral",
505 	if (of_at91_get_clk_range(np, "atmel,clk-input-range", &input))  in of_at91_clk_pll_get_characteristics()
508 	if (of_property_read_u32(np, "#atmel,pll-clk-output-range-cells",  in of_at91_clk_pll_get_characteristics()
515 	if (!of_get_property(np, "atmel,pll-clk-output-ranges", &tmp))  in of_at91_clk_pll_get_characteristics()
542 					       "atmel,pll-clk-output-ranges",  in of_at91_clk_pll_get_characteristics()
547 					       "atmel,pll-clk-output-ranges",  in of_at91_clk_pll_get_characteristics()
556 					       "atmel,pll-clk-output-ranges",  in of_at91_clk_pll_get_characteristics()
565 					       "atmel,pll-clk-output-ranges",  in of_at91_clk_pll_get_characteristics()
571 	characteristics->input = input;  in of_at91_clk_pll_get_characteristics()
572 	characteristics->num_output = num_output;  in of_at91_clk_pll_get_characteristics()
573 	characteristics->output = output;  in of_at91_clk_pll_get_characteristics()
574 	characteristics->out = out;  in of_at91_clk_pll_get_characteristics()
575 	characteristics->icpll = icpll;  in of_at91_clk_pll_get_characteristics()
595 	const char *name = np->name;  in of_at91_clk_pll_setup()
603 	of_property_read_string(np, "clock-output-names", &name);  in of_at91_clk_pll_setup()
629 CLK_OF_DECLARE(at91rm9200_clk_pll, "atmel,at91rm9200-clk-pll",
636 CLK_OF_DECLARE(at91sam9g45_clk_pll, "atmel,at91sam9g45-clk-pll",
643 CLK_OF_DECLARE(at91sam9g20_clk_pllb, "atmel,at91sam9g20-clk-pllb",
650 CLK_OF_DECLARE(sama5d3_clk_pll, "atmel,sama5d3-clk-pll",
658 	const char *name = np->name;  in of_at91sam9x5_clk_plldiv_setup()
663 	of_property_read_string(np, "clock-output-names", &name);  in of_at91sam9x5_clk_plldiv_setup()
675 CLK_OF_DECLARE(at91sam9x5_clk_plldiv, "atmel,at91sam9x5-clk-plldiv",
710 		if (of_property_read_string(np, "clock-output-names", &name))  in of_at91_clk_prog_setup()
711 			name = progclknp->name;  in of_at91_clk_prog_setup()
727 CLK_OF_DECLARE(at91rm9200_clk_prog, "atmel,at91rm9200-clk-programmable",
734 CLK_OF_DECLARE(at91sam9g45_clk_prog, "atmel,at91sam9g45-clk-programmable",
741 CLK_OF_DECLARE(at91sam9x5_clk_prog, "atmel,at91sam9x5-clk-programmable",
749 	const char *name = np->name;  in of_at91sam9260_clk_slow_setup()
761 	of_property_read_string(np, "clock-output-names", &name);  in of_at91sam9260_clk_slow_setup()
770 CLK_OF_DECLARE(at91sam9260_clk_slow, "atmel,at91sam9260-clk-slow",
781 	const char *name = np->name;  in of_at91sam9x5_clk_smd_setup()
790 	of_property_read_string(np, "clock-output-names", &name);  in of_at91sam9x5_clk_smd_setup()
803 CLK_OF_DECLARE(at91sam9x5_clk_smd, "atmel,at91sam9x5-clk-smd",
829 		if (of_property_read_string(np, "clock-output-names", &name))  in of_at91rm9200_clk_sys_setup()
830 			name = sysclknp->name;  in of_at91rm9200_clk_sys_setup()
841 CLK_OF_DECLARE(at91rm9200_clk_sys, "atmel,at91rm9200-clk-system",
852 	const char *name = np->name;  in of_at91sam9x5_clk_usb_setup()
861 	of_property_read_string(np, "clock-output-names", &name);  in of_at91sam9x5_clk_usb_setup()
874 CLK_OF_DECLARE(at91sam9x5_clk_usb, "atmel,at91sam9x5-clk-usb",
881 	const char *name = np->name;  in of_at91sam9n12_clk_usb_setup()
888 	of_property_read_string(np, "clock-output-names", &name);  in of_at91sam9n12_clk_usb_setup()
900 CLK_OF_DECLARE(at91sam9n12_clk_usb, "atmel,at91sam9n12-clk-usb",
907 	const char *name = np->name;  in of_at91rm9200_clk_usb_setup()
915 	of_property_read_u32_array(np, "atmel,clk-divisors", divisors, 4);  in of_at91rm9200_clk_usb_setup()
919 	of_property_read_string(np, "clock-output-names", &name);  in of_at91rm9200_clk_usb_setup()
930 CLK_OF_DECLARE(at91rm9200_clk_usb, "atmel,at91rm9200-clk-usb",
939 	const char *name = np->name;  in of_at91sam9x5_clk_utmi_setup()
944 	of_property_read_string(np, "clock-output-names", &name);  in of_at91sam9x5_clk_utmi_setup()
952 	 * set in the UTMI Clock Trimming register.  in of_at91sam9x5_clk_utmi_setup()
953 	 * - 9x5: mainck supports several rates but it is indicated that a  in of_at91sam9x5_clk_utmi_setup()
955 	 * - sama5d3 and sama5d2: mainck supports several rates. Configuring  in of_at91sam9x5_clk_utmi_setup()
956 	 *   the FREQ field of the UTMI Clock Trimming register is mandatory.  in of_at91sam9x5_clk_utmi_setup()
957 	 * - sama5d4: mainck is at 12 MHz.  in of_at91sam9x5_clk_utmi_setup()
961 	regmap_sfr = syscon_regmap_lookup_by_compatible("atmel,sama5d3-sfr");  in of_at91sam9x5_clk_utmi_setup()
963 		regmap_sfr = syscon_regmap_lookup_by_compatible("atmel,sama5d2-sfr");  in of_at91sam9x5_clk_utmi_setup()
974 CLK_OF_DECLARE(at91sam9x5_clk_utmi, "atmel,at91sam9x5-clk-utmi",