40 	struct sam9x60_pll_core core;  member
46 	struct sam9x60_pll_core core;  member
51 #define to_sam9x60_frac(core)	container_of(core, struct sam9x60_frac, core)  argument
52 #define to_sam9x60_div(core)	container_of(core, struct sam9x60_div, core)  argument
71 	struct sam9x60_pll_core *core = to_sam9x60_pll_core(hw);  in sam9x60_frac_pll_recalc_rate()  local
72 	struct sam9x60_frac *frac = to_sam9x60_frac(core);  in sam9x60_frac_pll_recalc_rate()
80 	struct sam9x60_pll_core *core = to_sam9x60_pll_core(hw);  in sam9x60_frac_pll_prepare()  local
81 	struct sam9x60_frac *frac = to_sam9x60_frac(core);  in sam9x60_frac_pll_prepare()
82 	struct regmap *regmap = core->regmap;  in sam9x60_frac_pll_prepare()
86 	spin_lock_irqsave(core->lock, flags);  in sam9x60_frac_pll_prepare()
89 			   AT91_PMC_PLL_UPDT_ID_MSK, core->id);  in sam9x60_frac_pll_prepare()
91 	cmul = (val & core->layout->mul_mask) >> core->layout->mul_shift;  in sam9x60_frac_pll_prepare()
92 	cfrac = (val & core->layout->frac_mask) >> core->layout->frac_shift;  in sam9x60_frac_pll_prepare()
94 	if (sam9x60_frac_pll_ready(regmap, core->id) &&  in sam9x60_frac_pll_prepare()
99 	if (core->characteristics->upll)  in sam9x60_frac_pll_prepare()
106 		     (frac->mul << core->layout->mul_shift) |  in sam9x60_frac_pll_prepare()
107 		     (frac->frac << core->layout->frac_shift));  in sam9x60_frac_pll_prepare()
109 	if (core->characteristics->upll) {  in sam9x60_frac_pll_prepare()
125 			   AT91_PMC_PLL_UPDT_UPDATE | core->id);  in sam9x60_frac_pll_prepare()
133 			   AT91_PMC_PLL_UPDT_UPDATE | core->id);  in sam9x60_frac_pll_prepare()
135 	while (!sam9x60_pll_ready(regmap, core->id))  in sam9x60_frac_pll_prepare()
139 	spin_unlock_irqrestore(core->lock, flags);  in sam9x60_frac_pll_prepare()
146 	struct sam9x60_pll_core *core = to_sam9x60_pll_core(hw);  in sam9x60_frac_pll_unprepare()  local
147 	struct regmap *regmap = core->regmap;  in sam9x60_frac_pll_unprepare()
150 	spin_lock_irqsave(core->lock, flags);  in sam9x60_frac_pll_unprepare()
153 			   AT91_PMC_PLL_UPDT_ID_MSK, core->id);  in sam9x60_frac_pll_unprepare()
157 	if (core->characteristics->upll)  in sam9x60_frac_pll_unprepare()
163 			   AT91_PMC_PLL_UPDT_UPDATE | core->id);  in sam9x60_frac_pll_unprepare()
165 	spin_unlock_irqrestore(core->lock, flags);  in sam9x60_frac_pll_unprepare()
170 	struct sam9x60_pll_core *core = to_sam9x60_pll_core(hw);  in sam9x60_frac_pll_is_prepared()  local
172 	return sam9x60_pll_ready(core->regmap, core->id);  in sam9x60_frac_pll_is_prepared()
175 static long sam9x60_frac_pll_compute_mul_frac(struct sam9x60_pll_core *core,  in sam9x60_frac_pll_compute_mul_frac()  argument
180 	struct sam9x60_frac *frac = to_sam9x60_frac(core);  in sam9x60_frac_pll_compute_mul_frac()
219 	struct sam9x60_pll_core *core = to_sam9x60_pll_core(hw);  in sam9x60_frac_pll_round_rate()  local
221 	return sam9x60_frac_pll_compute_mul_frac(core, rate, *parent_rate, false);  in sam9x60_frac_pll_round_rate()
227 	struct sam9x60_pll_core *core = to_sam9x60_pll_core(hw);  in sam9x60_frac_pll_set_rate()  local
229 	return sam9x60_frac_pll_compute_mul_frac(core, rate, parent_rate, true);  in sam9x60_frac_pll_set_rate()
243 	struct sam9x60_pll_core *core = to_sam9x60_pll_core(hw);  in sam9x60_div_pll_prepare()  local
244 	struct sam9x60_div *div = to_sam9x60_div(core);  in sam9x60_div_pll_prepare()
245 	struct regmap *regmap = core->regmap;  in sam9x60_div_pll_prepare()
249 	spin_lock_irqsave(core->lock, flags);  in sam9x60_div_pll_prepare()
251 			   AT91_PMC_PLL_UPDT_ID_MSK, core->id);  in sam9x60_div_pll_prepare()
253 	cdiv = (val & core->layout->div_mask) >> core->layout->div_shift;  in sam9x60_div_pll_prepare()
256 	if (!!(val & core->layout->endiv_mask) && cdiv == div->div)  in sam9x60_div_pll_prepare()
260 			   core->layout->div_mask | core->layout->endiv_mask,  in sam9x60_div_pll_prepare()
261 			   (div->div << core->layout->div_shift) |  in sam9x60_div_pll_prepare()
262 			   (1 << core->layout->endiv_shift));  in sam9x60_div_pll_prepare()
266 			   AT91_PMC_PLL_UPDT_UPDATE | core->id);  in sam9x60_div_pll_prepare()
268 	while (!sam9x60_pll_ready(regmap, core->id))  in sam9x60_div_pll_prepare()
272 	spin_unlock_irqrestore(core->lock, flags);  in sam9x60_div_pll_prepare()
279 	struct sam9x60_pll_core *core = to_sam9x60_pll_core(hw);  in sam9x60_div_pll_unprepare()  local
280 	struct regmap *regmap = core->regmap;  in sam9x60_div_pll_unprepare()
283 	spin_lock_irqsave(core->lock, flags);  in sam9x60_div_pll_unprepare()
286 			   AT91_PMC_PLL_UPDT_ID_MSK, core->id);  in sam9x60_div_pll_unprepare()
289 			   core->layout->endiv_mask, 0);  in sam9x60_div_pll_unprepare()
293 			   AT91_PMC_PLL_UPDT_UPDATE | core->id);  in sam9x60_div_pll_unprepare()
295 	spin_unlock_irqrestore(core->lock, flags);  in sam9x60_div_pll_unprepare()
300 	struct sam9x60_pll_core *core = to_sam9x60_pll_core(hw);  in sam9x60_div_pll_is_prepared()  local
301 	struct regmap *regmap = core->regmap;  in sam9x60_div_pll_is_prepared()
305 	spin_lock_irqsave(core->lock, flags);  in sam9x60_div_pll_is_prepared()
308 			   AT91_PMC_PLL_UPDT_ID_MSK, core->id);  in sam9x60_div_pll_is_prepared()
311 	spin_unlock_irqrestore(core->lock, flags);  in sam9x60_div_pll_is_prepared()
313 	return !!(val & core->layout->endiv_mask);  in sam9x60_div_pll_is_prepared()
319 	struct sam9x60_pll_core *core = to_sam9x60_pll_core(hw);  in sam9x60_div_pll_recalc_rate()  local
320 	struct sam9x60_div *div = to_sam9x60_div(core);  in sam9x60_div_pll_recalc_rate()
325 static long sam9x60_div_pll_compute_div(struct sam9x60_pll_core *core,  in sam9x60_div_pll_compute_div()  argument
330 							core->characteristics;  in sam9x60_div_pll_compute_div()
331 	struct clk_hw *parent = clk_hw_get_parent(&core->hw);  in sam9x60_div_pll_compute_div()
343 	for (divid = 1; divid < core->layout->div_mask; divid++) {  in sam9x60_div_pll_compute_div()
371 	struct sam9x60_pll_core *core = to_sam9x60_pll_core(hw);  in sam9x60_div_pll_round_rate()  local
373 	return sam9x60_div_pll_compute_div(core, parent_rate, rate);  in sam9x60_div_pll_round_rate()
379 	struct sam9x60_pll_core *core = to_sam9x60_pll_core(hw);  in sam9x60_div_pll_set_rate()  local
380 	struct sam9x60_div *div = to_sam9x60_div(core);  in sam9x60_div_pll_set_rate()
425 	frac->core.id = id;  in sam9x60_clk_register_frac_pll()
426 	frac->core.hw.init = &init;  in sam9x60_clk_register_frac_pll()
427 	frac->core.characteristics = characteristics;  in sam9x60_clk_register_frac_pll()
428 	frac->core.layout = layout;  in sam9x60_clk_register_frac_pll()
429 	frac->core.regmap = regmap;  in sam9x60_clk_register_frac_pll()
430 	frac->core.lock = lock;  in sam9x60_clk_register_frac_pll()
432 	spin_lock_irqsave(frac->core.lock, flags);  in sam9x60_clk_register_frac_pll()
453 		ret = sam9x60_frac_pll_compute_mul_frac(&frac->core, FCORE_MIN,  in sam9x60_clk_register_frac_pll()
460 	spin_unlock_irqrestore(frac->core.lock, flags);  in sam9x60_clk_register_frac_pll()
462 	hw = &frac->core.hw;  in sam9x60_clk_register_frac_pll()
472 	spin_unlock_irqrestore(frac->core.lock, flags);  in sam9x60_clk_register_frac_pll()
506 	div->core.id = id;  in sam9x60_clk_register_div_pll()
507 	div->core.hw.init = &init;  in sam9x60_clk_register_div_pll()
508 	div->core.characteristics = characteristics;  in sam9x60_clk_register_div_pll()
509 	div->core.layout = layout;  in sam9x60_clk_register_div_pll()
510 	div->core.regmap = regmap;  in sam9x60_clk_register_div_pll()
511 	div->core.lock = lock;  in sam9x60_clk_register_div_pll()
513 	spin_lock_irqsave(div->core.lock, flags);  in sam9x60_clk_register_div_pll()
520 	spin_unlock_irqrestore(div->core.lock, flags);  in sam9x60_clk_register_div_pll()
522 	hw = &div->core.hw;  in sam9x60_clk_register_div_pll()