Lines Matching +full:int +full:- +full:property
53 static int tegra_gmi_enable(struct tegra_gmi *gmi) in tegra_gmi_enable()
55 int err; in tegra_gmi_enable()
57 err = clk_prepare_enable(gmi->clk); in tegra_gmi_enable()
59 dev_err(gmi->dev, "failed to enable clock: %d\n", err); in tegra_gmi_enable()
63 reset_control_assert(gmi->rst); in tegra_gmi_enable()
65 reset_control_deassert(gmi->rst); in tegra_gmi_enable()
67 writel(gmi->snor_timing0, gmi->base + TEGRA_GMI_TIMING0); in tegra_gmi_enable()
68 writel(gmi->snor_timing1, gmi->base + TEGRA_GMI_TIMING1); in tegra_gmi_enable()
70 gmi->snor_config |= TEGRA_GMI_CONFIG_GO; in tegra_gmi_enable()
71 writel(gmi->snor_config, gmi->base + TEGRA_GMI_CONFIG); in tegra_gmi_enable()
81 config = readl(gmi->base + TEGRA_GMI_CONFIG); in tegra_gmi_disable()
83 writel(config, gmi->base + TEGRA_GMI_CONFIG); in tegra_gmi_disable()
85 reset_control_assert(gmi->rst); in tegra_gmi_disable()
86 clk_disable_unprepare(gmi->clk); in tegra_gmi_disable()
89 static int tegra_gmi_parse_dt(struct tegra_gmi *gmi) in tegra_gmi_parse_dt()
92 u32 property, ranges[4]; in tegra_gmi_parse_dt() local
93 int err; in tegra_gmi_parse_dt()
95 child = of_get_next_available_child(gmi->dev->of_node, NULL); in tegra_gmi_parse_dt()
97 dev_err(gmi->dev, "no child nodes found\n"); in tegra_gmi_parse_dt()
98 return -ENODEV; in tegra_gmi_parse_dt()
103 * chip-select address decoding. Which means that we only have one in tegra_gmi_parse_dt()
104 * chip-select line from the GMI controller. in tegra_gmi_parse_dt()
106 if (of_get_child_count(gmi->dev->of_node) > 1) in tegra_gmi_parse_dt()
107 dev_warn(gmi->dev, "only one child device is supported."); in tegra_gmi_parse_dt()
109 if (of_property_read_bool(child, "nvidia,snor-data-width-32bit")) in tegra_gmi_parse_dt()
110 gmi->snor_config |= TEGRA_GMI_BUS_WIDTH_32BIT; in tegra_gmi_parse_dt()
112 if (of_property_read_bool(child, "nvidia,snor-mux-mode")) in tegra_gmi_parse_dt()
113 gmi->snor_config |= TEGRA_GMI_MUX_MODE; in tegra_gmi_parse_dt()
115 if (of_property_read_bool(child, "nvidia,snor-rdy-active-before-data")) in tegra_gmi_parse_dt()
116 gmi->snor_config |= TEGRA_GMI_RDY_BEFORE_DATA; in tegra_gmi_parse_dt()
118 if (of_property_read_bool(child, "nvidia,snor-rdy-active-high")) in tegra_gmi_parse_dt()
119 gmi->snor_config |= TEGRA_GMI_RDY_ACTIVE_HIGH; in tegra_gmi_parse_dt()
121 if (of_property_read_bool(child, "nvidia,snor-adv-active-high")) in tegra_gmi_parse_dt()
122 gmi->snor_config |= TEGRA_GMI_ADV_ACTIVE_HIGH; in tegra_gmi_parse_dt()
124 if (of_property_read_bool(child, "nvidia,snor-oe-active-high")) in tegra_gmi_parse_dt()
125 gmi->snor_config |= TEGRA_GMI_OE_ACTIVE_HIGH; in tegra_gmi_parse_dt()
127 if (of_property_read_bool(child, "nvidia,snor-cs-active-high")) in tegra_gmi_parse_dt()
128 gmi->snor_config |= TEGRA_GMI_CS_ACTIVE_HIGH; in tegra_gmi_parse_dt()
134 if (err == -EOVERFLOW) { in tegra_gmi_parse_dt()
135 dev_err(gmi->dev, in tegra_gmi_parse_dt()
143 * CS# from the reg property instead. in tegra_gmi_parse_dt()
145 err = of_property_read_u32(child, "reg", &property); in tegra_gmi_parse_dt()
147 dev_err(gmi->dev, in tegra_gmi_parse_dt()
148 "failed to decode CS: no reg property found\n"); in tegra_gmi_parse_dt()
152 property = ranges[1]; in tegra_gmi_parse_dt()
155 /* Valid chip selects are CS0-CS7 */ in tegra_gmi_parse_dt()
156 if (property >= TEGRA_GMI_MAX_CHIP_SELECT) { in tegra_gmi_parse_dt()
157 dev_err(gmi->dev, "invalid chip select: %d", property); in tegra_gmi_parse_dt()
158 err = -EINVAL; in tegra_gmi_parse_dt()
162 gmi->snor_config |= TEGRA_GMI_CS_SELECT(property); in tegra_gmi_parse_dt()
165 if (!of_property_read_u32(child, "nvidia,snor-muxed-width", &property)) in tegra_gmi_parse_dt()
166 gmi->snor_timing0 |= TEGRA_GMI_MUXED_WIDTH(property); in tegra_gmi_parse_dt()
168 gmi->snor_timing0 |= TEGRA_GMI_MUXED_WIDTH(1); in tegra_gmi_parse_dt()
170 if (!of_property_read_u32(child, "nvidia,snor-hold-width", &property)) in tegra_gmi_parse_dt()
171 gmi->snor_timing0 |= TEGRA_GMI_HOLD_WIDTH(property); in tegra_gmi_parse_dt()
173 gmi->snor_timing0 |= TEGRA_GMI_HOLD_WIDTH(1); in tegra_gmi_parse_dt()
175 if (!of_property_read_u32(child, "nvidia,snor-adv-width", &property)) in tegra_gmi_parse_dt()
176 gmi->snor_timing0 |= TEGRA_GMI_ADV_WIDTH(property); in tegra_gmi_parse_dt()
178 gmi->snor_timing0 |= TEGRA_GMI_ADV_WIDTH(1); in tegra_gmi_parse_dt()
180 if (!of_property_read_u32(child, "nvidia,snor-ce-width", &property)) in tegra_gmi_parse_dt()
181 gmi->snor_timing0 |= TEGRA_GMI_CE_WIDTH(property); in tegra_gmi_parse_dt()
183 gmi->snor_timing0 |= TEGRA_GMI_CE_WIDTH(4); in tegra_gmi_parse_dt()
185 if (!of_property_read_u32(child, "nvidia,snor-we-width", &property)) in tegra_gmi_parse_dt()
186 gmi->snor_timing1 |= TEGRA_GMI_WE_WIDTH(property); in tegra_gmi_parse_dt()
188 gmi->snor_timing1 |= TEGRA_GMI_WE_WIDTH(1); in tegra_gmi_parse_dt()
190 if (!of_property_read_u32(child, "nvidia,snor-oe-width", &property)) in tegra_gmi_parse_dt()
191 gmi->snor_timing1 |= TEGRA_GMI_OE_WIDTH(property); in tegra_gmi_parse_dt()
193 gmi->snor_timing1 |= TEGRA_GMI_OE_WIDTH(1); in tegra_gmi_parse_dt()
195 if (!of_property_read_u32(child, "nvidia,snor-wait-width", &property)) in tegra_gmi_parse_dt()
196 gmi->snor_timing1 |= TEGRA_GMI_WAIT_WIDTH(property); in tegra_gmi_parse_dt()
198 gmi->snor_timing1 |= TEGRA_GMI_WAIT_WIDTH(3); in tegra_gmi_parse_dt()
205 static int tegra_gmi_probe(struct platform_device *pdev) in tegra_gmi_probe()
207 struct device *dev = &pdev->dev; in tegra_gmi_probe()
210 int err; in tegra_gmi_probe()
214 return -ENOMEM; in tegra_gmi_probe()
216 gmi->dev = dev; in tegra_gmi_probe()
219 gmi->base = devm_ioremap_resource(dev, res); in tegra_gmi_probe()
220 if (IS_ERR(gmi->base)) in tegra_gmi_probe()
221 return PTR_ERR(gmi->base); in tegra_gmi_probe()
223 gmi->clk = devm_clk_get(dev, "gmi"); in tegra_gmi_probe()
224 if (IS_ERR(gmi->clk)) { in tegra_gmi_probe()
226 return PTR_ERR(gmi->clk); in tegra_gmi_probe()
229 gmi->rst = devm_reset_control_get(dev, "gmi"); in tegra_gmi_probe()
230 if (IS_ERR(gmi->rst)) { in tegra_gmi_probe()
232 return PTR_ERR(gmi->rst); in tegra_gmi_probe()
243 err = of_platform_default_populate(dev->of_node, NULL, dev); in tegra_gmi_probe()
255 static int tegra_gmi_remove(struct platform_device *pdev) in tegra_gmi_remove()
259 of_platform_depopulate(gmi->dev); in tegra_gmi_remove()
266 { .compatible = "nvidia,tegra20-gmi", },
267 { .compatible = "nvidia,tegra30-gmi", },
276 .name = "tegra-gmi",