70 /* 66MHz DPLL clocks */
268  *	We must use the DPLL for
304 	/* See if we should use the DPLL */  in hpt3x2n_use_dpll()
317 	int dpll = hpt3x2n_use_dpll(ap, qc->tf.flags & ATA_TFLAG_WRITE);  in hpt3x2n_qc_defer()  local
324 	if ((flags & USE_DPLL) != dpll && alt->qc_active)  in hpt3x2n_qc_defer()
333 	int dpll = hpt3x2n_use_dpll(ap, qc->tf.flags & ATA_TFLAG_WRITE);  in hpt3x2n_qc_issue()  local
335 	if ((flags & USE_DPLL) != dpll) {  in hpt3x2n_qc_issue()
337 		flags |= dpll;  in hpt3x2n_qc_issue()
340 		hpt3x2n_set_clock(ap, dpll ? 0x21 : 0x23);  in hpt3x2n_qc_issue()
377  *	hpt3xn_calibrate_dpll		-	Calibrate the DPLL loop
380  *	Perform a calibration cycle on the HPT3xN DPLL. Returns 1 if this
401 			/* Turn off tuning, we have the DPLL set */  in hpt3xn_calibrate_dpll()
568 	f_low = (pci_mhz * 48) / 66;	/* PCI Mhz for 66Mhz DPLL */  in hpt3x2n_init_one()
582 		pr_err("DPLL did not stabilize!\n");  in hpt3x2n_init_one()
586 	pr_info("bus clock %dMHz, using 66MHz DPLL\n", pci_mhz);  in hpt3x2n_init_one()