x86/mm/cpu_entry_area.c

1 // SPDX-License-Identifier: GPL-2.0
43 	 * non-present PTEs, so be careful not to set it in that  in cea_set_pte()
56 	for ( ; pages; pages--, cea_vaddr+= PAGE_SIZE, ptr += PAGE_SIZE)  in cea_map_percpu_pages()
69 	cea = &get_cpu_entry_area(cpu)->cpu_debug_store;  in percpu_setup_debug_store()
75 	cea = &get_cpu_entry_area(cpu)->cpu_debug_buffers;  in percpu_setup_debug_store()
77 	 * Force the population of PMDs for not yet allocated per cpu  in percpu_setup_debug_store()
81 	for (; npages; npages--, cea += PAGE_SIZE)  in percpu_setup_debug_store()
89 	npages = sizeof(estacks->name## _stack) / PAGE_SIZE;		\
90 	cea_map_percpu_pages(cea->estacks.name## _stack,		\
91 			estacks->name## _stack, npages, PAGE_KERNEL);	\
102 	per_cpu(cea_exception_stacks, cpu) = &cea->estacks;  in percpu_setup_exception_stacks()
105 	 * The exceptions stack mappings in the per cpu area are protected  in percpu_setup_exception_stacks()
119 	cea_map_percpu_pages(&cea->doublefault_stack,  in percpu_setup_exception_stacks()
124 /* Setup the fixmap mappings only once per-processor */
129 	/* On 64-bit systems, we use a read-only fixmap GDT and TSS. */  in setup_cpu_entry_area()
134 	 * On native 32-bit systems, the GDT cannot be read-only because  in setup_cpu_entry_area()
137 	 * GDT is read-only, that will triple fault.  The TSS cannot be  in setup_cpu_entry_area()
138 	 * read-only because the CPU writes to it on task switches.  in setup_cpu_entry_area()
140 	 * On Xen PV, the GDT must be read-only because the hypervisor  in setup_cpu_entry_area()
148 	cea_set_pte(&cea->gdt, get_cpu_gdt_paddr(cpu), gdt_prot);  in setup_cpu_entry_area()
150 	cea_map_percpu_pages(&cea->entry_stack_page,  in setup_cpu_entry_area()
158 	 *  processor reads during a task switch (the first 104 bytes). The  in setup_cpu_entry_area()
159 	 *  processor may not correctly perform address translations if a  in setup_cpu_entry_area()
160 	 *  boundary occurs in this area. During a task switch, the processor  in setup_cpu_entry_area()
164 	 *  part of the 104 bytes is not physically contiguous, the processor  in setup_cpu_entry_area()
165 	 *  will access incorrect information without generating a page-fault  in setup_cpu_entry_area()
182 	cea_map_percpu_pages(&cea->tss, &per_cpu(cpu_tss_rw, cpu),  in setup_cpu_entry_area()