Lines Matching +full:reserved +full:- +full:ipi +full:- +full:vectors
1 // SPDX-License-Identifier: GPL-2.0-only
46 #define mod_64(x, y) ((x) - (y) * div64_u64(x, y))
57 #define APIC_VERSION (0x14UL | ((KVM_APIC_LVT_NUM - 1) << 16))
68 /* step-by-step approximation to mitigate fluctuation */
78 struct kvm_lapic *apic = vcpu->arch.apic; in kvm_apic_pending_eoi()
80 return apic_test_vector(vector, apic->regs + APIC_ISR) || in kvm_apic_pending_eoi()
81 apic_test_vector(vector, apic->regs + APIC_IRR); in kvm_apic_pending_eoi()
111 return apic->vcpu->vcpu_id; in kvm_x2apic_id()
122 && !(kvm_mwait_in_guest(vcpu->kvm) || in kvm_can_use_hv_timer()
129 return kvm_can_post_timer_interrupt(vcpu) && vcpu->mode == IN_GUEST_MODE; in kvm_use_posted_timer_interrupt()
134 switch (map->mode) { in kvm_apic_map_get_logical_dest()
137 u32 max_apic_id = map->max_apic_id; in kvm_apic_map_get_logical_dest()
140 u8 cluster_size = min(max_apic_id - offset + 1, 16U); in kvm_apic_map_get_logical_dest()
142 offset = array_index_nospec(offset, map->max_apic_id + 1); in kvm_apic_map_get_logical_dest()
143 *cluster = &map->phys_map[offset]; in kvm_apic_map_get_logical_dest()
144 *mask = dest_id & (0xffff >> (16 - cluster_size)); in kvm_apic_map_get_logical_dest()
152 *cluster = map->xapic_flat_map; in kvm_apic_map_get_logical_dest()
156 *cluster = map->xapic_cluster_map[(dest_id >> 4) & 0xf]; in kvm_apic_map_get_logical_dest()
173 * CLEAN -> DIRTY and UPDATE_IN_PROGRESS -> DIRTY changes happen without a lock.
175 * DIRTY -> UPDATE_IN_PROGRESS and UPDATE_IN_PROGRESS -> CLEAN happen with
191 /* Read kvm->arch.apic_map_dirty before kvm->arch.apic_map. */ in kvm_recalculate_apic_map()
192 if (atomic_read_acquire(&kvm->arch.apic_map_dirty) == CLEAN) in kvm_recalculate_apic_map()
195 mutex_lock(&kvm->arch.apic_map_lock); in kvm_recalculate_apic_map()
197 * Read kvm->arch.apic_map_dirty before kvm->arch.apic_map in kvm_recalculate_apic_map()
200 if (atomic_cmpxchg_acquire(&kvm->arch.apic_map_dirty, in kvm_recalculate_apic_map()
203 mutex_unlock(&kvm->arch.apic_map_lock); in kvm_recalculate_apic_map()
209 max_id = max(max_id, kvm_x2apic_id(vcpu->arch.apic)); in kvm_recalculate_apic_map()
218 new->max_apic_id = max_id; in kvm_recalculate_apic_map()
221 struct kvm_lapic *apic = vcpu->arch.apic; in kvm_recalculate_apic_map()
236 x2apic_id <= new->max_apic_id) in kvm_recalculate_apic_map()
237 new->phys_map[x2apic_id] = apic; in kvm_recalculate_apic_map()
239 * ... xAPIC ID of VCPUs with APIC ID > 0xff will wrap-around, in kvm_recalculate_apic_map()
242 if (!apic_x2apic_mode(apic) && !new->phys_map[xapic_id]) in kvm_recalculate_apic_map()
243 new->phys_map[xapic_id] = apic; in kvm_recalculate_apic_map()
251 new->mode |= KVM_APIC_MODE_X2APIC; in kvm_recalculate_apic_map()
255 new->mode |= KVM_APIC_MODE_XAPIC_FLAT; in kvm_recalculate_apic_map()
257 new->mode |= KVM_APIC_MODE_XAPIC_CLUSTER; in kvm_recalculate_apic_map()
264 cluster[ffs(mask) - 1] = apic; in kvm_recalculate_apic_map()
267 old = rcu_dereference_protected(kvm->arch.apic_map, in kvm_recalculate_apic_map()
268 lockdep_is_held(&kvm->arch.apic_map_lock)); in kvm_recalculate_apic_map()
269 rcu_assign_pointer(kvm->arch.apic_map, new); in kvm_recalculate_apic_map()
271 * Write kvm->arch.apic_map before clearing apic->apic_map_dirty. in kvm_recalculate_apic_map()
274 atomic_cmpxchg_release(&kvm->arch.apic_map_dirty, in kvm_recalculate_apic_map()
276 mutex_unlock(&kvm->arch.apic_map_lock); in kvm_recalculate_apic_map()
279 call_rcu(&old->rcu, kvm_apic_map_free); in kvm_recalculate_apic_map()
290 if (enabled != apic->sw_enabled) { in apic_set_spiv()
291 apic->sw_enabled = enabled; in apic_set_spiv()
297 atomic_set_release(&apic->vcpu->kvm->arch.apic_map_dirty, DIRTY); in apic_set_spiv()
304 atomic_set_release(&apic->vcpu->kvm->arch.apic_map_dirty, DIRTY); in kvm_apic_set_xapic_id()
310 atomic_set_release(&apic->vcpu->kvm->arch.apic_map_dirty, DIRTY); in kvm_apic_set_ldr()
316 atomic_set_release(&apic->vcpu->kvm->arch.apic_map_dirty, DIRTY); in kvm_apic_set_dfr()
328 WARN_ON_ONCE(id != apic->vcpu->vcpu_id); in kvm_apic_set_x2apic_id()
332 atomic_set_release(&apic->vcpu->kvm->arch.apic_map_dirty, DIRTY); in kvm_apic_set_x2apic_id()
342 return apic->lapic_timer.timer_mode == APIC_LVT_TIMER_ONESHOT; in apic_lvtt_oneshot()
347 return apic->lapic_timer.timer_mode == APIC_LVT_TIMER_PERIODIC; in apic_lvtt_period()
352 return apic->lapic_timer.timer_mode == APIC_LVT_TIMER_TSCDEADLINE; in apic_lvtt_tscdeadline()
362 struct kvm_lapic *apic = vcpu->arch.apic; in kvm_apic_set_version()
369 * KVM emulates 82093AA datasheet (with in-kernel IOAPIC implementation) in kvm_apic_set_version()
371 * Hyper-V role) disable EOI broadcast in lapic not checking for IOAPIC in kvm_apic_set_version()
372 * version first and level-triggered interrupts never get EOIed in in kvm_apic_set_version()
376 !ioapic_in_kernel(vcpu->kvm)) in kvm_apic_set_version()
385 LINT_MASK, LINT_MASK, /* LVT0-1 */
394 for (vec = MAX_APIC_VECTOR - APIC_VECTORS_PER_REG; in find_highest_vector()
395 vec >= 0; vec -= APIC_VECTORS_PER_REG) { in find_highest_vector()
401 return -1; in find_highest_vector()
424 max_updated_irr = -1; in __kvm_apic_update_irr()
425 *max_irr = -1; in __kvm_apic_update_irr()
443 return ((max_updated_irr != -1) && in __kvm_apic_update_irr()
450 struct kvm_lapic *apic = vcpu->arch.apic; in kvm_apic_update_irr()
452 return __kvm_apic_update_irr(pir, apic->regs, max_irr); in kvm_apic_update_irr()
458 return find_highest_vector(apic->regs + APIC_IRR); in apic_search_irr()
469 if (!apic->irr_pending) in apic_find_highest_irr()
470 return -1; in apic_find_highest_irr()
473 ASSERT(result == -1 || result >= 16); in apic_find_highest_irr()
482 vcpu = apic->vcpu; in apic_clear_irr()
484 if (unlikely(vcpu->arch.apicv_active)) { in apic_clear_irr()
486 kvm_lapic_clear_vector(vec, apic->regs + APIC_IRR); in apic_clear_irr()
490 apic->irr_pending = false; in apic_clear_irr()
491 kvm_lapic_clear_vector(vec, apic->regs + APIC_IRR); in apic_clear_irr()
492 if (apic_search_irr(apic) != -1) in apic_clear_irr()
493 apic->irr_pending = true; in apic_clear_irr()
499 apic_clear_irr(vec, vcpu->arch.apic); in kvm_apic_clear_irr()
507 if (__apic_test_and_set_vector(vec, apic->regs + APIC_ISR)) in apic_set_isr()
510 vcpu = apic->vcpu; in apic_set_isr()
517 if (unlikely(vcpu->arch.apicv_active)) in apic_set_isr()
520 ++apic->isr_count; in apic_set_isr()
521 BUG_ON(apic->isr_count > MAX_APIC_VECTOR); in apic_set_isr()
527 apic->highest_isr_cache = vec; in apic_set_isr()
537 * is always -1, with APIC virtualization enabled. in apic_find_highest_isr()
539 if (!apic->isr_count) in apic_find_highest_isr()
540 return -1; in apic_find_highest_isr()
541 if (likely(apic->highest_isr_cache != -1)) in apic_find_highest_isr()
542 return apic->highest_isr_cache; in apic_find_highest_isr()
544 result = find_highest_vector(apic->regs + APIC_ISR); in apic_find_highest_isr()
545 ASSERT(result == -1 || result >= 16); in apic_find_highest_isr()
553 if (!__apic_test_and_clear_vector(vec, apic->regs + APIC_ISR)) in apic_clear_isr()
556 vcpu = apic->vcpu; in apic_clear_isr()
560 * uses the Hyper-V APIC enlightenment. In this case we may need in apic_clear_isr()
565 if (unlikely(vcpu->arch.apicv_active)) in apic_clear_isr()
569 --apic->isr_count; in apic_clear_isr()
570 BUG_ON(apic->isr_count < 0); in apic_clear_isr()
571 apic->highest_isr_cache = -1; in apic_clear_isr()
582 return apic_find_highest_irr(vcpu->arch.apic); in kvm_lapic_find_highest_irr()
593 struct kvm_lapic *apic = vcpu->arch.apic; in kvm_apic_set_irq()
595 return __apic_accept_irq(apic, irq->delivery_mode, irq->vector, in kvm_apic_set_irq()
596 irq->level, irq->trig_mode, dest_map); in kvm_apic_set_irq()
605 if (min > map->max_apic_id) in __pv_send_ipi()
609 min((u32)BITS_PER_LONG, (map->max_apic_id - min + 1))) { in __pv_send_ipi()
610 if (map->phys_map[min + i]) { in __pv_send_ipi()
611 vcpu = map->phys_map[min + i]->vcpu; in __pv_send_ipi()
629 return -KVM_EINVAL; in kvm_pv_send_ipi()
637 map = rcu_dereference(kvm->arch.apic_map); in kvm_pv_send_ipi()
639 count = -EOPNOTSUPP; in kvm_pv_send_ipi()
653 return kvm_write_guest_cached(vcpu->kvm, &vcpu->arch.pv_eoi.data, &val, in pv_eoi_put_user()
660 return kvm_read_guest_cached(vcpu->kvm, &vcpu->arch.pv_eoi.data, val, in pv_eoi_get_user()
666 return vcpu->arch.pv_eoi.msr_val & KVM_MSR_ENABLED; in pv_eoi_enabled()
674 (unsigned long long)vcpu->arch.pv_eoi.msr_val); in pv_eoi_get_pending()
684 (unsigned long long)vcpu->arch.pv_eoi.msr_val); in pv_eoi_set_pending()
687 __set_bit(KVM_APIC_PV_EOI_PENDING, &vcpu->arch.apic_attention); in pv_eoi_set_pending()
694 (unsigned long long)vcpu->arch.pv_eoi.msr_val); in pv_eoi_clr_pending()
697 __clear_bit(KVM_APIC_PV_EOI_PENDING, &vcpu->arch.apic_attention); in pv_eoi_clr_pending()
703 if (apic->vcpu->arch.apicv_active) in apic_has_interrupt_for_ppr()
704 highest_irr = kvm_x86_ops.sync_pir_to_irr(apic->vcpu); in apic_has_interrupt_for_ppr()
707 if (highest_irr == -1 || (highest_irr & 0xF0) <= ppr) in apic_has_interrupt_for_ppr()
708 return -1; in apic_has_interrupt_for_ppr()
720 isrv = (isr != -1) ? isr : 0; in __apic_update_ppr()
739 apic_has_interrupt_for_ppr(apic, ppr) != -1) in apic_update_ppr()
740 kvm_make_request(KVM_REQ_EVENT, apic->vcpu); in apic_update_ppr()
745 apic_update_ppr(vcpu->arch.apic); in kvm_apic_update_ppr()
809 * - Real hardware delivers interrupts destined to x2APIC ID > 0xff to LAPICs
813 * - in-kernel IOAPIC messages have to be delivered directly to
816 * rewrites the destination of non-IPI messages from APIC_BROADCAST
820 * important when userspace wants to use x2APIC-format MSIs, because
821 * APIC_BROADCAST (0xff) is a legal route for "cluster 0, CPUs 0-7".
826 bool ipi = source != NULL; in kvm_apic_mda() local
828 if (!vcpu->kvm->arch.x2apic_broadcast_quirk_disabled && in kvm_apic_mda()
829 !ipi && dest_id == APIC_BROADCAST && apic_x2apic_mode(target)) in kvm_apic_mda()
838 struct kvm_lapic *target = vcpu->arch.apic; in kvm_apic_match_dest()
864 int i, idx = -1; in kvm_vector_to_index()
878 if (!kvm->arch.disabled_lapic_found) { in kvm_apic_disabled_lapic_found()
879 kvm->arch.disabled_lapic_found = true; in kvm_apic_disabled_lapic_found()
888 if (kvm->arch.x2apic_broadcast_quirk_disabled) { in kvm_apic_is_broadcast_dest()
889 if ((irq->dest_id == APIC_BROADCAST && in kvm_apic_is_broadcast_dest()
890 map->mode != KVM_APIC_MODE_X2APIC)) in kvm_apic_is_broadcast_dest()
892 if (irq->dest_id == X2APIC_BROADCAST) in kvm_apic_is_broadcast_dest()
896 if (irq->dest_id == (x2apic_ipi ? in kvm_apic_is_broadcast_dest()
918 if (irq->shorthand == APIC_DEST_SELF && src) { in kvm_apic_map_get_dest_lapic()
922 } else if (irq->shorthand) in kvm_apic_map_get_dest_lapic()
928 if (irq->dest_mode == APIC_DEST_PHYSICAL) { in kvm_apic_map_get_dest_lapic()
929 if (irq->dest_id > map->max_apic_id) { in kvm_apic_map_get_dest_lapic()
932 u32 dest_id = array_index_nospec(irq->dest_id, map->max_apic_id + 1); in kvm_apic_map_get_dest_lapic()
933 *dst = &map->phys_map[dest_id]; in kvm_apic_map_get_dest_lapic()
940 if (!kvm_apic_map_get_logical_dest(map, irq->dest_id, dst, in kvm_apic_map_get_dest_lapic()
948 lowest = -1; in kvm_apic_map_get_dest_lapic()
954 else if (kvm_apic_compare_prio((*dst)[i]->vcpu, in kvm_apic_map_get_dest_lapic()
955 (*dst)[lowest]->vcpu) < 0) in kvm_apic_map_get_dest_lapic()
962 lowest = kvm_vector_to_index(irq->vector, hweight16(*bitmap), in kvm_apic_map_get_dest_lapic()
986 *r = -1; in kvm_irq_delivery_to_apic_fast()
988 if (irq->shorthand == APIC_DEST_SELF) { in kvm_irq_delivery_to_apic_fast()
989 *r = kvm_apic_set_irq(src->vcpu, irq, dest_map); in kvm_irq_delivery_to_apic_fast()
994 map = rcu_dereference(kvm->arch.apic_map); in kvm_irq_delivery_to_apic_fast()
1002 *r += kvm_apic_set_irq(dst[i]->vcpu, irq, dest_map); in kvm_irq_delivery_to_apic_fast()
1013 * - For single-destination interrupts, handle it in posted mode
1014 * - Else if vector hashing is enabled and it is a lowest-priority
1017 * 1. For lowest-priority interrupts, store all the possible
1020 * the right destination vCPU in the array for the lowest-priority
1022 * - Otherwise, use remapped mode to inject the interrupt.
1032 if (irq->shorthand) in kvm_intr_is_single_vcpu_fast()
1036 map = rcu_dereference(kvm->arch.apic_map); in kvm_intr_is_single_vcpu_fast()
1043 *dest_vcpu = dst[i]->vcpu; in kvm_intr_is_single_vcpu_fast()
1061 struct kvm_vcpu *vcpu = apic->vcpu; in __apic_accept_irq()
1063 trace_kvm_apic_accept_irq(vcpu->vcpu_id, delivery_mode, in __apic_accept_irq()
1067 vcpu->arch.apic_arb_prio++; in __apic_accept_irq()
1080 __set_bit(vcpu->vcpu_id, dest_map->map); in __apic_accept_irq()
1081 dest_map->vectors[vcpu->vcpu_id] = vector; in __apic_accept_irq()
1084 if (apic_test_vector(vector, apic->regs + APIC_TMR) != !!trig_mode) { in __apic_accept_irq()
1087 apic->regs + APIC_TMR); in __apic_accept_irq()
1090 apic->regs + APIC_TMR); in __apic_accept_irq()
1102 vcpu->arch.pv.pv_unhalted = 1; in __apic_accept_irq()
1123 apic->pending_events = (1UL << KVM_APIC_INIT); in __apic_accept_irq()
1131 apic->sipi_vector = vector; in __apic_accept_irq()
1134 set_bit(KVM_APIC_SIPI, &apic->pending_events); in __apic_accept_irq()
1173 map = rcu_dereference(kvm->arch.apic_map); in kvm_bitmap_or_dest_vcpus()
1181 vcpu_idx = dest_vcpu[i]->vcpu->vcpu_idx; in kvm_bitmap_or_dest_vcpus()
1189 irq->shorthand, in kvm_bitmap_or_dest_vcpus()
1190 irq->dest_id, in kvm_bitmap_or_dest_vcpus()
1191 irq->dest_mode)) in kvm_bitmap_or_dest_vcpus()
1201 return vcpu1->arch.apic_arb_prio - vcpu2->arch.apic_arb_prio; in kvm_apic_compare_prio()
1206 return test_bit(vector, apic->vcpu->arch.ioapic_handled_vectors); in kvm_ioapic_handles_vector()
1218 if (irqchip_split(apic->vcpu->kvm)) { in kvm_ioapic_send_eoi()
1219 apic->vcpu->arch.pending_ioapic_eoi = vector; in kvm_ioapic_send_eoi()
1220 kvm_make_request(KVM_REQ_IOAPIC_EOI_EXIT, apic->vcpu); in kvm_ioapic_send_eoi()
1224 if (apic_test_vector(vector, apic->regs + APIC_TMR)) in kvm_ioapic_send_eoi()
1229 kvm_ioapic_update_eoi(apic->vcpu, vector, trigger_mode); in kvm_ioapic_send_eoi()
1242 if (vector == -1) in apic_set_eoi()
1248 if (test_bit(vector, vcpu_to_synic(apic->vcpu)->vec_bitmap)) in apic_set_eoi()
1249 kvm_hv_synic_send_eoi(apic->vcpu, vector); in apic_set_eoi()
1252 kvm_make_request(KVM_REQ_EVENT, apic->vcpu); in apic_set_eoi()
1257 * this interface assumes a trap-like exit, which has already finished
1262 struct kvm_lapic *apic = vcpu->arch.apic; in kvm_apic_set_eoi_accelerated()
1267 kvm_make_request(KVM_REQ_EVENT, apic->vcpu); in kvm_apic_set_eoi_accelerated()
1289 kvm_irq_delivery_to_apic(apic->vcpu->kvm, apic, &irq, NULL); in kvm_apic_send_ipi()
1302 apic->lapic_timer.period == 0) in apic_get_tmcct()
1306 remaining = ktime_sub(apic->lapic_timer.target_expiration, now); in apic_get_tmcct()
1310 ns = mod_64(ktime_to_ns(remaining), apic->lapic_timer.period); in apic_get_tmcct()
1312 (APIC_BUS_CYCLE_NS * apic->divide_count)); in apic_get_tmcct()
1319 struct kvm_vcpu *vcpu = apic->vcpu; in __report_tpr_access()
1320 struct kvm_run *run = vcpu->run; in __report_tpr_access()
1323 run->tpr_access.rip = kvm_rip_read(vcpu); in __report_tpr_access()
1324 run->tpr_access.is_write = write; in __report_tpr_access()
1329 if (apic->vcpu->arch.tpr_access_reporting) in report_tpr_access()
1372 (APIC_REG_MASK(first) * ((1ull << (count)) - 1))
1379 /* this bitmask has a bit cleared for each reserved register */ in kvm_lapic_reg_read()
1432 return addr >= apic->base_address && in apic_mmio_in_range()
1433 addr < apic->base_address + LAPIC_MMIO_LENGTH; in apic_mmio_in_range()
1440 u32 offset = address - apic->base_address; in apic_mmio_read()
1443 return -EOPNOTSUPP; in apic_mmio_read()
1446 if (!kvm_check_has_quirk(vcpu->kvm, in apic_mmio_read()
1448 return -EOPNOTSUPP; in apic_mmio_read()
1466 apic->divide_count = 0x1 << (tmp2 & 0x7); in update_divide_count()
1476 if (apic_lvtt_period(apic) && apic->lapic_timer.period) { in limit_periodic_timer_frequency()
1479 if (apic->lapic_timer.period < min_period) { in limit_periodic_timer_frequency()
1483 apic->vcpu->vcpu_id, in limit_periodic_timer_frequency()
1484 apic->lapic_timer.period, min_period); in limit_periodic_timer_frequency()
1485 apic->lapic_timer.period = min_period; in limit_periodic_timer_frequency()
1495 apic->lapic_timer.timer_mode_mask; in apic_update_lvtt()
1497 if (apic->lapic_timer.timer_mode != timer_mode) { in apic_update_lvtt()
1500 hrtimer_cancel(&apic->lapic_timer.timer); in apic_update_lvtt()
1502 if (apic->lapic_timer.hv_timer_in_use) in apic_update_lvtt()
1506 apic->lapic_timer.period = 0; in apic_update_lvtt()
1507 apic->lapic_timer.tscdeadline = 0; in apic_update_lvtt()
1509 apic->lapic_timer.timer_mode = timer_mode; in apic_update_lvtt()
1516 * during a higher-priority task.
1521 struct kvm_lapic *apic = vcpu->arch.apic; in lapic_timer_int_injected()
1526 void *bitmap = apic->regs + APIC_ISR; in lapic_timer_int_injected()
1528 if (vcpu->arch.apicv_active) in lapic_timer_int_injected()
1529 bitmap = apic->regs + APIC_IRR; in lapic_timer_int_injected()
1539 u64 timer_advance_ns = vcpu->arch.apic->lapic_timer.timer_advance_ns; in __wait_lapic_expire()
1547 if (vcpu->arch.tsc_scaling_ratio == kvm_default_tsc_scaling_ratio) { in __wait_lapic_expire()
1552 do_div(delay_ns, vcpu->arch.virtual_tsc_khz); in __wait_lapic_expire()
1560 struct kvm_lapic *apic = vcpu->arch.apic; in adjust_lapic_timer_advance()
1561 u32 timer_advance_ns = apic->lapic_timer.timer_advance_ns; in adjust_lapic_timer_advance()
1571 ns = -advance_expire_delta * 1000000ULL; in adjust_lapic_timer_advance()
1572 do_div(ns, vcpu->arch.virtual_tsc_khz); in adjust_lapic_timer_advance()
1573 timer_advance_ns -= ns/LAPIC_TIMER_ADVANCE_ADJUST_STEP; in adjust_lapic_timer_advance()
1577 do_div(ns, vcpu->arch.virtual_tsc_khz); in adjust_lapic_timer_advance()
1583 apic->lapic_timer.timer_advance_ns = timer_advance_ns; in adjust_lapic_timer_advance()
1588 struct kvm_lapic *apic = vcpu->arch.apic; in __kvm_wait_lapic_expire()
1591 tsc_deadline = apic->lapic_timer.expired_tscdeadline; in __kvm_wait_lapic_expire()
1592 apic->lapic_timer.expired_tscdeadline = 0; in __kvm_wait_lapic_expire()
1594 apic->lapic_timer.advance_expire_delta = guest_tsc - tsc_deadline; in __kvm_wait_lapic_expire()
1597 __wait_lapic_expire(vcpu, tsc_deadline - guest_tsc); in __kvm_wait_lapic_expire()
1600 adjust_lapic_timer_advance(vcpu, apic->lapic_timer.advance_expire_delta); in __kvm_wait_lapic_expire()
1606 vcpu->arch.apic->lapic_timer.expired_tscdeadline && in kvm_wait_lapic_expire()
1607 vcpu->arch.apic->lapic_timer.timer_advance_ns && in kvm_wait_lapic_expire()
1615 struct kvm_timer *ktimer = &apic->lapic_timer; in kvm_apic_inject_pending_timer_irqs()
1619 ktimer->tscdeadline = 0; in kvm_apic_inject_pending_timer_irqs()
1621 ktimer->tscdeadline = 0; in kvm_apic_inject_pending_timer_irqs()
1622 ktimer->target_expiration = 0; in kvm_apic_inject_pending_timer_irqs()
1628 struct kvm_vcpu *vcpu = apic->vcpu; in apic_timer_expired()
1629 struct kvm_timer *ktimer = &apic->lapic_timer; in apic_timer_expired()
1631 if (atomic_read(&apic->lapic_timer.pending)) in apic_timer_expired()
1634 if (apic_lvtt_tscdeadline(apic) || ktimer->hv_timer_in_use) in apic_timer_expired()
1635 ktimer->expired_tscdeadline = ktimer->tscdeadline; in apic_timer_expired()
1637 if (!from_timer_fn && vcpu->arch.apicv_active) { in apic_timer_expired()
1643 if (kvm_use_posted_timer_interrupt(apic->vcpu)) { in apic_timer_expired()
1649 atomic_inc(&apic->lapic_timer.pending); in apic_timer_expired()
1657 struct kvm_timer *ktimer = &apic->lapic_timer; in start_sw_tscdeadline()
1658 u64 guest_tsc, tscdeadline = ktimer->tscdeadline; in start_sw_tscdeadline()
1661 struct kvm_vcpu *vcpu = apic->vcpu; in start_sw_tscdeadline()
1662 unsigned long this_tsc_khz = vcpu->arch.virtual_tsc_khz; in start_sw_tscdeadline()
1674 ns = (tscdeadline - guest_tsc) * 1000000ULL; in start_sw_tscdeadline()
1678 likely(ns > apic->lapic_timer.timer_advance_ns)) { in start_sw_tscdeadline()
1680 expire = ktime_sub_ns(expire, ktimer->timer_advance_ns); in start_sw_tscdeadline()
1681 hrtimer_start(&ktimer->timer, expire, HRTIMER_MODE_ABS_HARD); in start_sw_tscdeadline()
1690 return (u64)tmict * APIC_BUS_CYCLE_NS * (u64)apic->divide_count; in tmict_to_ns()
1698 apic->lapic_timer.period = in update_target_expiration()
1703 remaining = ktime_sub(apic->lapic_timer.target_expiration, now); in update_target_expiration()
1709 apic->divide_count, old_divisor); in update_target_expiration()
1711 apic->lapic_timer.tscdeadline += in update_target_expiration()
1712 nsec_to_cycles(apic->vcpu, ns_remaining_new) - in update_target_expiration()
1713 nsec_to_cycles(apic->vcpu, ns_remaining_old); in update_target_expiration()
1714 apic->lapic_timer.target_expiration = ktime_add_ns(now, ns_remaining_new); in update_target_expiration()
1724 apic->lapic_timer.period = in set_target_expiration()
1727 if (!apic->lapic_timer.period) { in set_target_expiration()
1728 apic->lapic_timer.tscdeadline = 0; in set_target_expiration()
1733 deadline = apic->lapic_timer.period; in set_target_expiration()
1740 deadline = apic->lapic_timer.period; in set_target_expiration()
1741 else if (unlikely(deadline > apic->lapic_timer.period)) { in set_target_expiration()
1746 apic->vcpu->vcpu_id, in set_target_expiration()
1749 deadline, apic->lapic_timer.period); in set_target_expiration()
1751 deadline = apic->lapic_timer.period; in set_target_expiration()
1756 apic->lapic_timer.tscdeadline = kvm_read_l1_tsc(apic->vcpu, tscl) + in set_target_expiration()
1757 nsec_to_cycles(apic->vcpu, deadline); in set_target_expiration()
1758 apic->lapic_timer.target_expiration = ktime_add_ns(now, deadline); in set_target_expiration()
1776 apic->lapic_timer.target_expiration = in advance_periodic_target_expiration()
1777 ktime_add_ns(apic->lapic_timer.target_expiration, in advance_periodic_target_expiration()
1778 apic->lapic_timer.period); in advance_periodic_target_expiration()
1779 delta = ktime_sub(apic->lapic_timer.target_expiration, now); in advance_periodic_target_expiration()
1780 apic->lapic_timer.tscdeadline = kvm_read_l1_tsc(apic->vcpu, tscl) + in advance_periodic_target_expiration()
1781 nsec_to_cycles(apic->vcpu, delta); in advance_periodic_target_expiration()
1786 if (!apic->lapic_timer.period) in start_sw_period()
1790 apic->lapic_timer.target_expiration)) { in start_sw_period()
1799 hrtimer_start(&apic->lapic_timer.timer, in start_sw_period()
1800 apic->lapic_timer.target_expiration, in start_sw_period()
1809 return vcpu->arch.apic->lapic_timer.hv_timer_in_use; in kvm_lapic_hv_timer_in_use()
1816 WARN_ON(!apic->lapic_timer.hv_timer_in_use); in cancel_hv_timer()
1817 kvm_x86_ops.cancel_hv_timer(apic->vcpu); in cancel_hv_timer()
1818 apic->lapic_timer.hv_timer_in_use = false; in cancel_hv_timer()
1823 struct kvm_timer *ktimer = &apic->lapic_timer; in start_hv_timer()
1824 struct kvm_vcpu *vcpu = apic->vcpu; in start_hv_timer()
1831 if (!ktimer->tscdeadline) in start_hv_timer()
1834 if (kvm_x86_ops.set_hv_timer(vcpu, ktimer->tscdeadline, &expired)) in start_hv_timer()
1837 ktimer->hv_timer_in_use = true; in start_hv_timer()
1838 hrtimer_cancel(&ktimer->timer); in start_hv_timer()
1843 * VM-Exit to recompute the periodic timer's target expiration. in start_hv_timer()
1850 if (atomic_read(&ktimer->pending)) { in start_hv_timer()
1858 trace_kvm_hv_timer_state(vcpu->vcpu_id, ktimer->hv_timer_in_use); in start_hv_timer()
1865 struct kvm_timer *ktimer = &apic->lapic_timer; in start_sw_timer()
1868 if (apic->lapic_timer.hv_timer_in_use) in start_sw_timer()
1870 if (!apic_lvtt_period(apic) && atomic_read(&ktimer->pending)) in start_sw_timer()
1877 trace_kvm_hv_timer_state(apic->vcpu->vcpu_id, false); in start_sw_timer()
1884 if (!apic_lvtt_period(apic) && atomic_read(&apic->lapic_timer.pending)) in restart_apic_timer()
1895 struct kvm_lapic *apic = vcpu->arch.apic; in kvm_lapic_expired_hv_timer()
1899 if (!apic->lapic_timer.hv_timer_in_use) in kvm_lapic_expired_hv_timer()
1901 WARN_ON(rcuwait_active(&vcpu->wait)); in kvm_lapic_expired_hv_timer()
1905 if (apic_lvtt_period(apic) && apic->lapic_timer.period) { in kvm_lapic_expired_hv_timer()
1916 restart_apic_timer(vcpu->arch.apic); in kvm_lapic_switch_to_hv_timer()
1922 struct kvm_lapic *apic = vcpu->arch.apic; in kvm_lapic_switch_to_sw_timer()
1926 if (apic->lapic_timer.hv_timer_in_use) in kvm_lapic_switch_to_sw_timer()
1934 struct kvm_lapic *apic = vcpu->arch.apic; in kvm_lapic_restart_hv_timer()
1936 WARN_ON(!apic->lapic_timer.hv_timer_in_use); in kvm_lapic_restart_hv_timer()
1942 atomic_set(&apic->lapic_timer.pending, 0); in __start_apic_timer()
1960 if (apic->lvt0_in_nmi_mode != lvt0_in_nmi_mode) { in apic_manage_nmi_watchdog()
1961 apic->lvt0_in_nmi_mode = lvt0_in_nmi_mode; in apic_manage_nmi_watchdog()
1963 atomic_inc(&apic->vcpu->kvm->arch.vapics_in_nmi_mode); in apic_manage_nmi_watchdog()
1965 atomic_dec(&apic->vcpu->kvm->arch.vapics_in_nmi_mode); in apic_manage_nmi_watchdog()
2022 atomic_set(&apic->lapic_timer.pending, 0); in kvm_lapic_reg_write()
2055 (reg - APIC_LVTT) >> 4, size); in kvm_lapic_reg_write()
2064 val &= (apic_lvt_mask[0] | apic->lapic_timer.timer_mode_mask); in kvm_lapic_reg_write()
2073 hrtimer_cancel(&apic->lapic_timer.timer); in kvm_lapic_reg_write()
2079 uint32_t old_divisor = apic->divide_count; in kvm_lapic_reg_write()
2083 if (apic->divide_count != old_divisor && in kvm_lapic_reg_write()
2084 apic->lapic_timer.period) { in kvm_lapic_reg_write()
2085 hrtimer_cancel(&apic->lapic_timer.timer); in kvm_lapic_reg_write()
2108 kvm_recalculate_apic_map(apic->vcpu->kvm); in kvm_lapic_reg_write()
2118 unsigned int offset = address - apic->base_address; in apic_mmio_write()
2122 return -EOPNOTSUPP; in apic_mmio_write()
2125 if (!kvm_check_has_quirk(vcpu->kvm, in apic_mmio_write()
2127 return -EOPNOTSUPP; in apic_mmio_write()
2133 * APIC register must be aligned on 128-bits boundary. in apic_mmio_write()
2149 kvm_lapic_reg_write(vcpu->arch.apic, APIC_EOI, 0); in kvm_lapic_set_eoi()
2161 kvm_lapic_reg_read(vcpu->arch.apic, offset, 4, &val); in kvm_apic_write_nodecode()
2164 kvm_lapic_reg_write(vcpu->arch.apic, offset, val); in kvm_apic_write_nodecode()
2170 struct kvm_lapic *apic = vcpu->arch.apic; in kvm_free_lapic()
2172 if (!vcpu->arch.apic) in kvm_free_lapic()
2175 hrtimer_cancel(&apic->lapic_timer.timer); in kvm_free_lapic()
2177 if (!(vcpu->arch.apic_base & MSR_IA32_APICBASE_ENABLE)) in kvm_free_lapic()
2180 if (!apic->sw_enabled) in kvm_free_lapic()
2183 if (apic->regs) in kvm_free_lapic()
2184 free_page((unsigned long)apic->regs); in kvm_free_lapic()
2190 *----------------------------------------------------------------------
2192 *----------------------------------------------------------------------
2196 struct kvm_lapic *apic = vcpu->arch.apic; in kvm_get_lapic_tscdeadline_msr()
2201 return apic->lapic_timer.tscdeadline; in kvm_get_lapic_tscdeadline_msr()
2206 struct kvm_lapic *apic = vcpu->arch.apic; in kvm_set_lapic_tscdeadline_msr()
2211 hrtimer_cancel(&apic->lapic_timer.timer); in kvm_set_lapic_tscdeadline_msr()
2212 apic->lapic_timer.tscdeadline = data; in kvm_set_lapic_tscdeadline_msr()
2218 struct kvm_lapic *apic = vcpu->arch.apic; in kvm_lapic_set_tpr()
2228 tpr = (u64) kvm_lapic_get_reg(vcpu->arch.apic, APIC_TASKPRI); in kvm_lapic_get_cr8()
2235 u64 old_value = vcpu->arch.apic_base; in kvm_lapic_set_base()
2236 struct kvm_lapic *apic = vcpu->arch.apic; in kvm_lapic_set_base()
2241 vcpu->arch.apic_base = value; in kvm_lapic_set_base()
2252 kvm_apic_set_xapic_id(apic, vcpu->vcpu_id); in kvm_lapic_set_base()
2256 atomic_set_release(&apic->vcpu->kvm->arch.apic_map_dirty, DIRTY); in kvm_lapic_set_base()
2261 kvm_apic_set_x2apic_id(apic, vcpu->vcpu_id); in kvm_lapic_set_base()
2266 apic->base_address = apic->vcpu->arch.apic_base & in kvm_lapic_set_base()
2270 apic->base_address != APIC_DEFAULT_PHYS_BASE) in kvm_lapic_set_base()
2276 struct kvm_lapic *apic = vcpu->arch.apic; in kvm_apic_update_apicv()
2278 if (vcpu->arch.apicv_active) { in kvm_apic_update_apicv()
2280 apic->irr_pending = true; in kvm_apic_update_apicv()
2281 apic->isr_count = 1; in kvm_apic_update_apicv()
2283 apic->irr_pending = (apic_search_irr(apic) != -1); in kvm_apic_update_apicv()
2284 apic->isr_count = count_vectors(apic->regs + APIC_ISR); in kvm_apic_update_apicv()
2291 struct kvm_lapic *apic = vcpu->arch.apic; in kvm_lapic_reset()
2298 hrtimer_cancel(&apic->lapic_timer.timer); in kvm_lapic_reset()
2303 kvm_apic_set_xapic_id(apic, vcpu->vcpu_id); in kvm_lapic_reset()
2305 kvm_apic_set_version(apic->vcpu); in kvm_lapic_reset()
2311 kvm_check_has_quirk(vcpu->kvm, KVM_X86_QUIRK_LINT0_REENABLED)) in kvm_lapic_reset()
2332 apic->highest_isr_cache = -1; in kvm_lapic_reset()
2334 atomic_set(&apic->lapic_timer.pending, 0); in kvm_lapic_reset()
2337 vcpu->arch.apic_base | MSR_IA32_APICBASE_BSP); in kvm_lapic_reset()
2338 vcpu->arch.pv_eoi.msr_val = 0; in kvm_lapic_reset()
2340 if (vcpu->arch.apicv_active) { in kvm_lapic_reset()
2342 kvm_x86_ops.hwapic_irr_update(vcpu, -1); in kvm_lapic_reset()
2343 kvm_x86_ops.hwapic_isr_update(vcpu, -1); in kvm_lapic_reset()
2346 vcpu->arch.apic_arb_prio = 0; in kvm_lapic_reset()
2347 vcpu->arch.apic_attention = 0; in kvm_lapic_reset()
2349 kvm_recalculate_apic_map(vcpu->kvm); in kvm_lapic_reset()
2353 *----------------------------------------------------------------------
2355 *----------------------------------------------------------------------
2365 struct kvm_lapic *apic = vcpu->arch.apic; in apic_has_pending_timer()
2368 return atomic_read(&apic->lapic_timer.pending); in apic_has_pending_timer()
2390 struct kvm_lapic *apic = vcpu->arch.apic; in kvm_apic_nmi_wd_deliver()
2410 hrtimer_add_expires_ns(&ktimer->timer, ktimer->period); in apic_timer_fn()
2426 vcpu->arch.apic = apic; in kvm_create_lapic()
2428 apic->regs = (void *)get_zeroed_page(GFP_KERNEL_ACCOUNT); in kvm_create_lapic()
2429 if (!apic->regs) { in kvm_create_lapic()
2431 vcpu->vcpu_id); in kvm_create_lapic()
2434 apic->vcpu = vcpu; in kvm_create_lapic()
2436 hrtimer_init(&apic->lapic_timer.timer, CLOCK_MONOTONIC, in kvm_create_lapic()
2438 apic->lapic_timer.timer.function = apic_timer_fn; in kvm_create_lapic()
2439 if (timer_advance_ns == -1) { in kvm_create_lapic()
2440 apic->lapic_timer.timer_advance_ns = LAPIC_TIMER_ADVANCE_NS_INIT; in kvm_create_lapic()
2443 apic->lapic_timer.timer_advance_ns = timer_advance_ns; in kvm_create_lapic()
2451 vcpu->arch.apic_base = MSR_IA32_APICBASE_ENABLE; in kvm_create_lapic()
2453 kvm_iodevice_init(&apic->dev, &apic_mmio_ops); in kvm_create_lapic()
2458 vcpu->arch.apic = NULL; in kvm_create_lapic()
2460 return -ENOMEM; in kvm_create_lapic()
2465 struct kvm_lapic *apic = vcpu->arch.apic; in kvm_apic_has_interrupt()
2469 return -1; in kvm_apic_has_interrupt()
2478 u32 lvt0 = kvm_lapic_get_reg(vcpu->arch.apic, APIC_LVT0); in kvm_apic_accept_pic_intr()
2480 if (!kvm_apic_hw_enabled(vcpu->arch.apic)) in kvm_apic_accept_pic_intr()
2490 struct kvm_lapic *apic = vcpu->arch.apic; in kvm_inject_apic_timer_irqs()
2492 if (atomic_read(&apic->lapic_timer.pending) > 0) { in kvm_inject_apic_timer_irqs()
2494 atomic_set(&apic->lapic_timer.pending, 0); in kvm_inject_apic_timer_irqs()
2501 struct kvm_lapic *apic = vcpu->arch.apic; in kvm_get_apic_interrupt()
2504 if (vector == -1) in kvm_get_apic_interrupt()
2505 return -1; in kvm_get_apic_interrupt()
2515 if (test_bit(vector, vcpu_to_synic(vcpu)->auto_eoi_bitmap)) { in kvm_get_apic_interrupt()
2517 * For auto-EOI interrupts, there might be another pending in kvm_get_apic_interrupt()
2525 * be a higher-priority pending interrupt---except if there was in kvm_get_apic_interrupt()
2539 if (apic_x2apic_mode(vcpu->arch.apic)) { in kvm_apic_state_fixup()
2540 u32 *id = (u32 *)(s->regs + APIC_ID); in kvm_apic_state_fixup()
2541 u32 *ldr = (u32 *)(s->regs + APIC_LDR); in kvm_apic_state_fixup()
2543 if (vcpu->kvm->arch.x2apic_format) { in kvm_apic_state_fixup()
2544 if (*id != vcpu->vcpu_id) in kvm_apic_state_fixup()
2545 return -EINVAL; in kvm_apic_state_fixup()
2563 memcpy(s->regs, vcpu->arch.apic->regs, sizeof(*s)); in kvm_apic_get_state()
2569 __kvm_lapic_set_reg(s->regs, APIC_TMCCT, in kvm_apic_get_state()
2570 __apic_read(vcpu->arch.apic, APIC_TMCCT)); in kvm_apic_get_state()
2577 struct kvm_lapic *apic = vcpu->arch.apic; in kvm_apic_set_state()
2580 kvm_lapic_set_base(vcpu, vcpu->arch.apic_base); in kvm_apic_set_state()
2582 apic_set_spiv(apic, *((u32 *)(s->regs + APIC_SPIV))); in kvm_apic_set_state()
2586 kvm_recalculate_apic_map(vcpu->kvm); in kvm_apic_set_state()
2589 memcpy(vcpu->arch.apic->regs, s->regs, sizeof(*s)); in kvm_apic_set_state()
2591 atomic_set_release(&apic->vcpu->kvm->arch.apic_map_dirty, DIRTY); in kvm_apic_set_state()
2592 kvm_recalculate_apic_map(vcpu->kvm); in kvm_apic_set_state()
2596 hrtimer_cancel(&apic->lapic_timer.timer); in kvm_apic_set_state()
2602 apic->highest_isr_cache = -1; in kvm_apic_set_state()
2603 if (vcpu->arch.apicv_active) { in kvm_apic_set_state()
2611 if (ioapic_in_kernel(vcpu->kvm)) in kvm_apic_set_state()
2614 vcpu->arch.apic_arb_prio = 0; in kvm_apic_set_state()
2627 timer = &vcpu->arch.apic->lapic_timer.timer; in __kvm_migrate_apic_timer()
2633 * apic_sync_pv_eoi_from_guest - called on vmexit or cancel interrupt
2649 * -> host disabled PV EOI. in apic_sync_pv_eoi_from_guest()
2651 * -> host enabled PV EOI, guest did not execute EOI yet. in apic_sync_pv_eoi_from_guest()
2653 * -> host enabled PV EOI, guest executed EOI. in apic_sync_pv_eoi_from_guest()
2673 if (test_bit(KVM_APIC_PV_EOI_PENDING, &vcpu->arch.apic_attention)) in kvm_lapic_sync_from_vapic()
2674 apic_sync_pv_eoi_from_guest(vcpu, vcpu->arch.apic); in kvm_lapic_sync_from_vapic()
2676 if (!test_bit(KVM_APIC_CHECK_VAPIC, &vcpu->arch.apic_attention)) in kvm_lapic_sync_from_vapic()
2679 if (kvm_read_guest_cached(vcpu->kvm, &vcpu->arch.apic->vapic_cache, &data, in kvm_lapic_sync_from_vapic()
2683 apic_set_tpr(vcpu->arch.apic, data & 0xff); in kvm_lapic_sync_from_vapic()
2687 * apic_sync_pv_eoi_to_guest - called before vmentry
2697 apic->irr_pending || in apic_sync_pv_eoi_to_guest()
2699 apic->highest_isr_cache == -1 || in apic_sync_pv_eoi_to_guest()
2701 kvm_ioapic_handles_vector(apic, apic->highest_isr_cache)) { in apic_sync_pv_eoi_to_guest()
2709 pv_eoi_set_pending(apic->vcpu); in apic_sync_pv_eoi_to_guest()
2716 struct kvm_lapic *apic = vcpu->arch.apic; in kvm_lapic_sync_to_vapic()
2720 if (!test_bit(KVM_APIC_CHECK_VAPIC, &vcpu->arch.apic_attention)) in kvm_lapic_sync_to_vapic()
2732 kvm_write_guest_cached(vcpu->kvm, &vcpu->arch.apic->vapic_cache, &data, in kvm_lapic_sync_to_vapic()
2739 if (kvm_gfn_to_hva_cache_init(vcpu->kvm, in kvm_lapic_set_vapic_addr()
2740 &vcpu->arch.apic->vapic_cache, in kvm_lapic_set_vapic_addr()
2742 return -EINVAL; in kvm_lapic_set_vapic_addr()
2743 __set_bit(KVM_APIC_CHECK_VAPIC, &vcpu->arch.apic_attention); in kvm_lapic_set_vapic_addr()
2745 __clear_bit(KVM_APIC_CHECK_VAPIC, &vcpu->arch.apic_attention); in kvm_lapic_set_vapic_addr()
2748 vcpu->arch.apic->vapic_addr = vapic_addr; in kvm_lapic_set_vapic_addr()
2754 struct kvm_lapic *apic = vcpu->arch.apic; in kvm_x2apic_msr_write()
2755 u32 reg = (msr - APIC_BASE_MSR) << 4; in kvm_x2apic_msr_write()
2771 struct kvm_lapic *apic = vcpu->arch.apic; in kvm_x2apic_msr_read()
2772 u32 reg = (msr - APIC_BASE_MSR) << 4, low, high = 0; in kvm_x2apic_msr_read()
2792 struct kvm_lapic *apic = vcpu->arch.apic; in kvm_hv_vapic_msr_write()
2805 struct kvm_lapic *apic = vcpu->arch.apic; in kvm_hv_vapic_msr_read()
2824 struct gfn_to_hva_cache *ghc = &vcpu->arch.pv_eoi.data; in kvm_lapic_enable_pv_eoi()
2830 vcpu->arch.pv_eoi.msr_val = data; in kvm_lapic_enable_pv_eoi()
2834 if (addr == ghc->gpa && len <= ghc->len) in kvm_lapic_enable_pv_eoi()
2835 new_len = ghc->len; in kvm_lapic_enable_pv_eoi()
2839 return kvm_gfn_to_hva_cache_init(vcpu->kvm, ghc, addr, new_len); in kvm_lapic_enable_pv_eoi()
2844 struct kvm_lapic *apic = vcpu->arch.apic; in kvm_apic_accept_events()
2848 if (!lapic_in_kernel(vcpu) || !apic->pending_events) in kvm_apic_accept_events()
2853 * (SMM, VMX non-root mode, SVM with GIF=0). in kvm_apic_accept_events()
2860 WARN_ON_ONCE(vcpu->arch.mp_state == KVM_MP_STATE_INIT_RECEIVED); in kvm_apic_accept_events()
2861 if (test_bit(KVM_APIC_SIPI, &apic->pending_events)) in kvm_apic_accept_events()
2862 clear_bit(KVM_APIC_SIPI, &apic->pending_events); in kvm_apic_accept_events()
2866 pe = xchg(&apic->pending_events, 0); in kvm_apic_accept_events()
2869 if (kvm_vcpu_is_bsp(apic->vcpu)) in kvm_apic_accept_events()
2870 vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE; in kvm_apic_accept_events()
2872 vcpu->arch.mp_state = KVM_MP_STATE_INIT_RECEIVED; in kvm_apic_accept_events()
2875 vcpu->arch.mp_state == KVM_MP_STATE_INIT_RECEIVED) { in kvm_apic_accept_events()
2878 sipi_vector = apic->sipi_vector; in kvm_apic_accept_events()
2880 vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE; in kvm_apic_accept_events()