1 // SPDX-License-Identifier: GPL-2.0-only
13  *	Mikael Pettersson	:	Power Management for UP-APIC.
60 #include <asm/intel-family.h>
68 unsigned int boot_cpu_physical_apicid __ro_after_init = -1U;
147  * +1=force-enable
239  * so apic->write/read doesn't do anything
292  * get_physical_broadcast - Get number of physical broadcast IDs
301  * lapic_get_maxlvt - get the maximum number of local vector table entries
306 	 * - we always have APIC integrated on 64bit mode  in lapic_get_maxlvt()
307 	 * - 82489DXs do not report # of LVT entries  in lapic_get_maxlvt()
350 		 * See Intel SDM: TSC-Deadline Mode chapter. In xAPIC mode,  in __setup_APIC_LVTT()
410 			/* may not change if vectors are different */  in reserve_eilvt_offset()
432 	unsigned int new, old, reserved;  in setup_APIC_eilvt()  local
436 	reserved = reserve_eilvt_offset(offset, new);  in setup_APIC_eilvt()
438 	if (reserved != new) {  in setup_APIC_eilvt()
442 		       smp_processor_id(), reg, offset, new, reserved);  in setup_APIC_eilvt()
443 		return -EINVAL;  in setup_APIC_eilvt()
451 		return -EBUSY;  in setup_APIC_eilvt()
485 	if (evt->features & CLOCK_EVT_FEAT_DUMMY)  in lapic_timer_shutdown()
499 	if (evt->features & CLOCK_EVT_FEAT_DUMMY)  in lapic_timer_set_periodic_oneshot()
522 	apic->send_IPI_mask(mask, LOCAL_TIMER_VECTOR);  in lapic_timer_broadcast()
543 	.irq				= -1,
592 	rev = (u32)m->driver_data;  in apic_validate_deadline_timer()
618 	levt->cpumask = cpumask_of(smp_processor_id());  in setup_APIC_timer()
621 		levt->name = "lapic-deadline";  in setup_APIC_timer()
622 		levt->features &= ~(CLOCK_EVT_FEAT_PERIODIC |  in setup_APIC_timer()
624 		levt->set_next_event = lapic_next_deadline;  in setup_APIC_timer()
649 	 * The clockevent device's ->mult and ->shift can both be  in lapic_update_tsc_freq()
679 static __initdata int lapic_cal_loops = -1;
725 	return -1;  in calibrate_by_pmtimer()
728 	apic_printk(APIC_VERBOSE, "... PM-Timer delta = %ld\n", deltapm);  in calibrate_by_pmtimer()
732 		return -1;  in calibrate_by_pmtimer()
736 	if (deltapm > (pm_100ms - pm_thresh) &&  in calibrate_by_pmtimer()
738 		apic_printk(APIC_VERBOSE, "... PM-Timer result ok\n");  in calibrate_by_pmtimer()
745 		"with PM-Timer: %ldms instead of 100ms\n", (long)res);  in calibrate_by_pmtimer()
750 	pr_info("APIC delta adjusted to PM-Timer: "  in calibrate_by_pmtimer()
759 					  "PM-Timer: %lu (%ld)\n",  in calibrate_by_pmtimer()
770 		return -1;  in lapic_init_clockevent()
892 				if ((tsc_now - tsc_start) >= tsc_perj) {  in calibrate_APIC_clock()
915 	/* Build delta t1-t2 as apic timer counts down */  in calibrate_APIC_clock()
916 	delta = lapic_cal_t1 - lapic_cal_t2;  in calibrate_APIC_clock()
919 	deltatsc = (long)(lapic_cal_tsc2 - lapic_cal_tsc1);  in calibrate_APIC_clock()
922 	pm_referenced = !calibrate_by_pmtimer(lapic_cal_pm2 - lapic_cal_pm1,  in calibrate_APIC_clock()
951 		return -1;  in calibrate_APIC_clock()
954 	levt->features &= ~CLOCK_EVT_FEAT_DUMMY;  in calibrate_APIC_clock()
967 		levt->event_handler = lapic_cal_handler;  in calibrate_APIC_clock()
969 		lapic_cal_loops = -1;  in calibrate_APIC_clock()
982 		deltaj = lapic_cal_j2 - lapic_cal_j1;  in calibrate_APIC_clock()
986 		if (deltaj >= LAPIC_CAL_LOOPS-2 && deltaj <= LAPIC_CAL_LOOPS+2)  in calibrate_APIC_clock()
989 			levt->features |= CLOCK_EVT_FEAT_DUMMY;  in calibrate_APIC_clock()
993 	if (levt->features & CLOCK_EVT_FEAT_DUMMY) {  in calibrate_APIC_clock()
995 		return -1;  in calibrate_APIC_clock()
1063 	 * its possible that when we get here evt->event_handler is NULL.  in local_apic_timer_interrupt()
1067 	if (!evt->event_handler) {  in local_apic_timer_interrupt()
1076 	 * the NMI deadlock-detector uses this.  in local_apic_timer_interrupt()
1080 	evt->event_handler(evt);  in local_apic_timer_interrupt()
1088  * [ if a single-CPU system runs an SMP kernel then we call the local
1105 	return -EINVAL;  in setup_profiling_timer()
1113  * clear_local_APIC - shutdown the local APIC
1134 		v = ERROR_APIC_VECTOR; /* any non-zero vector will do */  in clear_local_APIC()
1139 	 * any level-triggered sources.  in clear_local_APIC()
1188  * apic_soft_disable - Clears and software disables the local APIC on hotplug
1211  * disable_local_APIC - clear and disable the local APIC
1238  * re-entering the BIOS on shutdown.  Otherwise the BIOS may get confused and
1239  * not power-off.  Additionally clear all LVT entries before disable_local_APIC
1263  * sync_Arb_IDs - synchronize APIC bus arbitration IDs
1268 	 * Unsupported on P4 - see Intel Dev. Manual Vol. 3, Ch. 8.6.1 And not  in sync_Arb_IDs()
1296 	/* On 64-bit, the APIC must be integrated, Check local APIC only */  in __apic_intr_mode_select()
1303 	/* On 32-bit, the APIC may be integrated APIC or 82489DX */  in __apic_intr_mode_select()
1363 	 * through-I/O-APIC virtual wire mode might be active.  in init_bsp_APIC()
1381 	/* This bit is reserved on P4/Xeon and should be cleared */  in init_bsp_APIC()
1447 	if (apic->disable_esr) {  in lapic_setup_esr()
1451 		 * ESR disabled - we can't do anything useful with the  in lapic_setup_esr()
1452 		 * errors anyway - mbligh  in lapic_setup_esr()
1494 		irr->regs[i] = apic_read(APIC_IRR + i * 0x10);  in apic_check_and_ack()
1498 		isr->regs[i] = apic_read(APIC_ISR + i * 0x10);  in apic_check_and_ack()
1505 	if (!bitmap_empty(isr->map, APIC_IR_BITS)) {  in apic_check_and_ack()
1511 		for_each_set_bit(bit, isr->map, APIC_IR_BITS)  in apic_check_and_ack()
1516 	return !bitmap_empty(irr->map, APIC_IR_BITS);  in apic_check_and_ack()
1548  * setup_local_APIC - setup the local APIC
1572 	/* Pound the ESR really hard over the head with a big hammer - mbligh */  in setup_local_APIC()
1573 	if (lapic_is_integrated() && apic->disable_esr) {  in setup_local_APIC()
1581 	 * Double-check whether this APIC is really registered.  in setup_local_APIC()
1584 	BUG_ON(!apic->apic_id_registered());  in setup_local_APIC()
1588 	 * an APIC.  See e.g. "AP-388 82489DX User's Manual" (Intel  in setup_local_APIC()
1591 	apic->init_apic_ldr();  in setup_local_APIC()
1594 	if (apic->dest_logical) {  in setup_local_APIC()
1612 	 * Set Task Priority to 'accept all except vectors 0-31'.  An APIC  in setup_local_APIC()
1613 	 * vector in the 16-31 range could be delivered if TPR == 0, but we  in setup_local_APIC()
1643 	 * away, oh well :-(  in setup_local_APIC()
1645 	 * [ This bug can be reproduced easily with a level-triggered  in setup_local_APIC()
1652 	 * like LRU than MRU (the short-term load is more even across CPUs).  in setup_local_APIC()
1656 	 * - enable focus processor (bit==0)  in setup_local_APIC()
1657 	 * - 64bit mode always use processor focus  in setup_local_APIC()
1674 	 * set up through-local-APIC on the boot CPU's LINT0. This is not  in setup_local_APIC()
1675 	 * strictly necessary in pure symmetric-IO mode, but sometimes  in setup_local_APIC()
1679 	 * TODO: set up through-local-APIC from through-I/O-APIC? --macro  in setup_local_APIC()
1895 		pr_info("Not enabling interrupt remapping due to skipped IO-APIC setup\n");  in enable_IR_x2apic()
1905 		pr_info("Saving IO-APIC state failed: %d\n", ret);  in enable_IR_x2apic()
1910 	legacy_pic->mask_all();  in enable_IR_x2apic()
1921 	legacy_pic->restore_mask();  in enable_IR_x2apic()
1927  * Detect and enable local APICs on non-SMP boards.
1929  * On AMD64 we trust the BIOS - if it says no APIC it is likely
1936 		return -1;  in detect_init_APIC()
1955 		return -1;  in apic_verify()
1976 		return -1;  in apic_force_enable()
1986 			pr_info("Local APIC disabled by BIOS -- reenabling.\n");  in apic_force_enable()
2003 		return -1;  in detect_init_APIC()
2024 		 * Over-ride BIOS and try to enable the local APIC only if  in detect_init_APIC()
2028 			pr_info("Local APIC disabled by BIOS -- "  in detect_init_APIC()
2030 			return -1;  in detect_init_APIC()
2033 			return -1;  in detect_init_APIC()
2036 			return -1;  in detect_init_APIC()
2045 	return -1;  in detect_init_APIC()
2050  * init_apic_mappings - initialize APIC mappings
2088 		 * yeah -- we lie about apic_version  in init_apic_mappings()
2107 	if (boot_cpu_physical_apicid == -1U) {  in register_lapic_address()
2118  * spurious_interrupt - Catch all for interrupts raised on unused vectors
2178 		"Redirectable IPI",		/* APIC Error Bit 4 */  in DEFINE_IDTENTRY_SYSVEC()
2187 	/* First tickle the hardware, only then report what went on. -- REW */  in DEFINE_IDTENTRY_SYSVEC()
2211  * connect_bsp_APIC - attach the APIC to the interrupt system
2233  * disconnect_bsp_APIC - detach the APIC from the interrupt system
2311 	[0 ... NR_CPUS - 1] = -1,
2316  * apic_id_is_primary_thread - Check whether APIC ID belongs to a primary thread
2326 	mask = (1U << (fls(smp_num_siblings) - 1)) - 1;  in apic_id_is_primary_thread()
2340 	 * cpuid <-> apicid mapping is persistent, so when a cpu is up,  in allocate_logical_cpuid()
2353 		return -EINVAL;  in allocate_logical_cpuid()
2369 	 * currently booting-up processor. However, on some platforms,  in generic_processor_info()
2373 	 * - arch/x86/kernel/mpparse.c: MP_processor_info()  in generic_processor_info()
2374 	 * - arch/x86/mm/amdtopology.c: amd_numa_init()  in generic_processor_info()
2394 		return -ENODEV;  in generic_processor_info()
2399 	 * nr_cpu_ids - 1 processors and keep one slot free for boot cpu  in generic_processor_info()
2401 	if (!boot_cpu_detected && num_processors >= nr_cpu_ids - 1 &&  in generic_processor_info()
2403 		int thiscpu = max + disabled_cpus - 1;  in generic_processor_info()
2410 		return -ENODEV;  in generic_processor_info()
2420 		return -EINVAL;  in generic_processor_info()
2433 		/* Logical cpuid 0 is reserved for BSP. */  in generic_processor_info()
2439 			return -EINVAL;  in generic_processor_info()
2466 		apic->x86_32_early_logical_apicid(cpu);  in generic_processor_info()
2493 		WARN_ON((*drv)->eoi_write == eoi_write);  in apic_set_eoi_write()
2494 		(*drv)->native_eoi_write = (*drv)->eoi_write;  in apic_set_eoi_write()
2495 		(*drv)->eoi_write = eoi_write;  in apic_set_eoi_write()
2502 	apic_write(APIC_ID, apic->set_apic_id(boot_cpu_physical_apicid));  in apic_bsp_up_setup()
2506 	 * on a cpu with non-zero lapic id. But boot_cpu_physical_apicid  in apic_bsp_up_setup()
2517  * apic_bsp_setup - Setup function for local apic and io-apic
2633 	 * IO-APIC and PIC have their own resume routines.  in lapic_resume()
2636 	 * and interrupt-remapping.  in lapic_resume()
2639 	legacy_pic->mask_all();  in lapic_resume()
2692  * This device has no shutdown method - fully functioning local APICs
2733 	pr_info("APIC: %s detected, Multi Chassis\n", d->ident);  in set_multi()
2760  * apic_is_clustered_box() -- Check if we can expect good TSC
2764  * multi-chassis.
2820 		return -EINVAL;  in apic_set_verbosity()
2831 		return -EINVAL;  in apic_set_verbosity()
2842 		return -1;  in lapic_insert_resource()
2846 	lapic_resource.end = lapic_resource.start + PAGE_SIZE - 1;  in lapic_insert_resource()
2861 		return -EINVAL;  in apic_set_disabled_cpu_apicid()
2870 		return -EINVAL;  in apic_set_extnmi()
2880 		return -EINVAL;  in apic_set_extnmi()