include/asm/msr.h

1 /* SPDX-License-Identifier: GPL-2.0 */
5 #include "msr-index.h"
47  * both i386 and x86_64 returns 64-bit value in edx:eax, but gcc's "A"
53 /* Using 64-bit values saves one instruction clearing the high half of low */
54 #define DECLARE_ARGS(val, low, high)	unsigned long low, high  argument
55 #define EAX_EDX_VAL(val, low, high)	((low) | (high) << 32)  argument
56 #define EAX_EDX_RET(val, low, high)	"=a" (low), "=d" (high)  argument
58 #define DECLARE_ARGS(val, low, high)	unsigned long long val  argument
59 #define EAX_EDX_VAL(val, low, high)	(val)  argument
60 #define EAX_EDX_RET(val, low, high)	"=A" (val)  argument
64  * Be very careful with includes. This header is prone to include loops.
67 #include <linux/tracepoint-defs.h>
85  * on them - those are *purely* for accessing MSRs and nothing more. So don't even
86  * think of extending them - you will be slapped with a stinking trout or a frozen
91 	DECLARE_ARGS(val, low, high);  in __rdmsr()
96 		     : EAX_EDX_RET(val, low, high) : "c" (msr));  in __rdmsr()
98 	return EAX_EDX_VAL(val, low, high);  in __rdmsr()
101 static inline void notrace __wrmsr(unsigned int msr, u32 low, u32 high)  in __wrmsr()  argument
106 		     : : "c" (msr), "a"(low), "d" (high) : "memory");  in __wrmsr()
116 #define native_wrmsr(msr, low, high)			\  argument
117 	__wrmsr(msr, low, high)
138 	DECLARE_ARGS(val, low, high);  in native_read_msr_safe()
149 		     : [err] "=r" (*err), EAX_EDX_RET(val, low, high)  in native_read_msr_safe()
150 		     : "c" (msr), [fault] "i" (-EIO));  in native_read_msr_safe()
152 		do_trace_read_msr(msr, EAX_EDX_VAL(val, low, high), *err);  in native_read_msr_safe()
153 	return EAX_EDX_VAL(val, low, high);  in native_read_msr_safe()
158 native_write_msr(unsigned int msr, u32 low, u32 high)  in native_write_msr()  argument
160 	__wrmsr(msr, low, high);  in native_write_msr()
163 		do_trace_write_msr(msr, ((u64)high << 32 | low), 0);  in native_write_msr()
168 native_write_msr_safe(unsigned int msr, u32 low, u32 high)  in native_write_msr_safe()  argument
179 		     : "c" (msr), "0" (low), "d" (high),  in native_write_msr_safe()
180 		       [fault] "i" (-EIO)  in native_write_msr_safe()
183 		do_trace_write_msr(msr, ((u64)high << 32 | low), err);  in native_write_msr_safe()
191  * rdtsc() - returns the current TSC without ordering constraints
193  * rdtsc() returns the result of RDTSC as a 64-bit integer.  The
197  * results can be non-monotonic if compared on different CPUs.
201 	DECLARE_ARGS(val, low, high);  in rdtsc()
203 	asm volatile("rdtsc" : EAX_EDX_RET(val, low, high));  in rdtsc()
205 	return EAX_EDX_VAL(val, low, high);  in rdtsc()
209  * rdtsc_ordered() - read the current TSC in program order
211  * rdtsc_ordered() returns the result of RDTSC as a 64-bit integer.
212  * It is ordered like a load to a global in-memory counter.  It should
213  * be impossible to observe non-monotonic rdtsc_unordered() behavior
218 	DECLARE_ARGS(val, low, high);  in rdtsc_ordered()
221 	 * The RDTSC instruction is not ordered relative to memory  in rdtsc_ordered()
225 	 * immediately after an appropriate barrier appears to be  in rdtsc_ordered()
237 			: EAX_EDX_RET(val, low, high)  in rdtsc_ordered()
241 	return EAX_EDX_VAL(val, low, high);  in rdtsc_ordered()
246 	DECLARE_ARGS(val, low, high);  in native_read_pmc()
248 	asm volatile("rdpmc" : EAX_EDX_RET(val, low, high) : "c" (counter));  in native_read_pmc()
250 		do_trace_rdpmc(counter, EAX_EDX_VAL(val, low, high), 0);  in native_read_pmc()
251 	return EAX_EDX_VAL(val, low, high);  in native_read_pmc()
259  * Access to machine-specific registers (available on 586 and better only)
261  * pointer indirection), this allows gcc to optimize better
264 #define rdmsr(msr, low, high)					\  argument
267 	(void)((low) = (u32)__val);				\
268 	(void)((high) = (u32)(__val >> 32));			\
271 static inline void wrmsr(unsigned int msr, u32 low, u32 high)  in wrmsr()  argument
273 	native_write_msr(msr, low, high);  in wrmsr()
285 static inline int wrmsr_safe(unsigned int msr, u32 low, u32 high)  in wrmsr_safe()  argument
287 	return native_write_msr_safe(msr, low, high);  in wrmsr_safe()
291 #define rdmsr_safe(msr, low, high)				\  argument
295 	(*low) = (u32)__val;					\
296 	(*high) = (u32)(__val >> 32);				\
308 #define rdpmc(counter, low, high)			\  argument
311 	(low)  = (u32)_l;				\
312 	(high) = (u32)(_l >> 32);			\
320  * 64-bit version of wrmsr_safe():
327 #define write_tsc(low, high) wrmsr(MSR_IA32_TSC, (low), (high))  argument