Lines Matching +full:free +full:- +full:running

1 /* SPDX-License-Identifier: GPL-2.0 */
5 #include <linux/io-64-nonatomic-lo-hi.h>
154 /* event config registers are 8-byte apart */
227 if (offset < box->pmu->type->mmio_map_size) in uncore_mmio_is_valid_offset()
231 offset, box->pmu->type->name); in uncore_mmio_is_valid_offset()
239 return box->pmu->type->box_ctl + in uncore_mmio_box_ctl()
240 box->pmu->type->mmio_offset * box->pmu->pmu_idx; in uncore_mmio_box_ctl()
245 return box->pmu->type->box_ctl; in uncore_pci_box_ctl()
250 return box->pmu->type->fixed_ctl; in uncore_pci_fixed_ctl()
255 return box->pmu->type->fixed_ctr; in uncore_pci_fixed_ctr()
261 if (test_bit(UNCORE_BOX_FLAG_CTL_OFFS8, &box->flags)) in uncore_pci_event_ctl()
262 return idx * 8 + box->pmu->type->event_ctl; in uncore_pci_event_ctl()
264 return idx * 4 + box->pmu->type->event_ctl; in uncore_pci_event_ctl()
270 return idx * 8 + box->pmu->type->perf_ctr; in uncore_pci_perf_ctr()
275 struct intel_uncore_pmu *pmu = box->pmu; in uncore_msr_box_offset()
276 return pmu->type->msr_offsets ? in uncore_msr_box_offset()
277 pmu->type->msr_offsets[pmu->pmu_idx] : in uncore_msr_box_offset()
278 pmu->type->msr_offset * pmu->pmu_idx; in uncore_msr_box_offset()
283 if (!box->pmu->type->box_ctl) in uncore_msr_box_ctl()
285 return box->pmu->type->box_ctl + uncore_msr_box_offset(box); in uncore_msr_box_ctl()
290 if (!box->pmu->type->fixed_ctl) in uncore_msr_fixed_ctl()
292 return box->pmu->type->fixed_ctl + uncore_msr_box_offset(box); in uncore_msr_fixed_ctl()
297 return box->pmu->type->fixed_ctr + uncore_msr_box_offset(box); in uncore_msr_fixed_ctr()
302 * In the uncore document, there is no event-code assigned to free running
303 * counters. Some events need to be defined to indicate the free running
304 * counters. The events are encoded as event-code + umask-code.
306 * The event-code for all free running counters is 0xff, which is the same as
309 * The umask-code is used to distinguish a fixed counter and a free running
310 * counter, and different types of free running counters.
311 * - For fixed counters, the umask-code is 0x0X.
313 * - For free running counters, the umask-code uses the rest of the space.
315 * X stands for the type of free running counters, which starts from 1.
316 * Y stands for the index of free running counters of same type, which
319 * For example, there are three types of IIO free running counters on Skylake
321 * The event-code for all the free running counters is 0xff.
323 * which umask-code starts from 0x10.
326 * the second type, which umask-code starts from 0x20.
338 return ((((config >> 8) - UNCORE_FREERUNNING_UMASK_START) >> 4) & 0xf); in uncore_freerunning_type()
345 unsigned int type = uncore_freerunning_type(event->hw.config); in uncore_freerunning_counter()
346 unsigned int idx = uncore_freerunning_idx(event->hw.config); in uncore_freerunning_counter()
347 struct intel_uncore_pmu *pmu = box->pmu; in uncore_freerunning_counter()
349 return pmu->type->freerunning[type].counter_base + in uncore_freerunning_counter()
350 pmu->type->freerunning[type].counter_offset * idx + in uncore_freerunning_counter()
351 (pmu->type->freerunning[type].box_offsets ? in uncore_freerunning_counter()
352 pmu->type->freerunning[type].box_offsets[pmu->pmu_idx] : in uncore_freerunning_counter()
353 pmu->type->freerunning[type].box_offset * pmu->pmu_idx); in uncore_freerunning_counter()
359 if (test_bit(UNCORE_BOX_FLAG_CFL8_CBOX_MSR_OFFS, &box->flags)) { in uncore_msr_event_ctl()
361 (box->pmu->type->pair_ctr_ctl ? 2 * idx : idx); in uncore_msr_event_ctl()
363 return box->pmu->type->event_ctl + in uncore_msr_event_ctl()
364 (box->pmu->type->pair_ctr_ctl ? 2 * idx : idx) + in uncore_msr_event_ctl()
372 if (test_bit(UNCORE_BOX_FLAG_CFL8_CBOX_MSR_OFFS, &box->flags)) { in uncore_msr_perf_ctr()
374 (box->pmu->type->pair_ctr_ctl ? 2 * idx : idx); in uncore_msr_perf_ctr()
376 return box->pmu->type->perf_ctr + in uncore_msr_perf_ctr()
377 (box->pmu->type->pair_ctr_ctl ? 2 * idx : idx) + in uncore_msr_perf_ctr()
385 if (box->pci_dev || box->io_addr) in uncore_fixed_ctl()
394 if (box->pci_dev || box->io_addr) in uncore_fixed_ctr()
403 if (box->pci_dev || box->io_addr) in uncore_event_ctl()
412 if (box->pci_dev || box->io_addr) in uncore_perf_ctr()
420 return box->pmu->type->perf_ctr_bits; in uncore_perf_ctr_bits()
425 return box->pmu->type->fixed_ctr_bits; in uncore_fixed_ctr_bits()
432 unsigned int type = uncore_freerunning_type(event->hw.config); in uncore_freerunning_bits()
434 return box->pmu->type->freerunning[type].bits; in uncore_freerunning_bits()
440 unsigned int type = uncore_freerunning_type(event->hw.config); in uncore_num_freerunning()
442 return box->pmu->type->freerunning[type].num_counters; in uncore_num_freerunning()
448 return box->pmu->type->num_freerunning_types; in uncore_num_freerunning_types()
454 unsigned int type = uncore_freerunning_type(event->hw.config); in check_valid_freerunning_event()
455 unsigned int idx = uncore_freerunning_idx(event->hw.config); in check_valid_freerunning_event()
463 return box->pmu->type->num_counters; in uncore_num_counters()
468 u64 cfg = event->attr.config; in is_freerunning_event()
481 return -EINVAL; in uncore_freerunning_hw_config()
487 box->pmu->type->ops->disable_event(box, event); in uncore_disable_event()
493 box->pmu->type->ops->enable_event(box, event); in uncore_enable_event()
499 return box->pmu->type->ops->read_counter(box, event); in uncore_read_counter()
504 if (!test_and_set_bit(UNCORE_BOX_FLAG_INITIATED, &box->flags)) { in uncore_box_init()
505 if (box->pmu->type->ops->init_box) in uncore_box_init()
506 box->pmu->type->ops->init_box(box); in uncore_box_init()
512 if (test_and_clear_bit(UNCORE_BOX_FLAG_INITIATED, &box->flags)) { in uncore_box_exit()
513 if (box->pmu->type->ops->exit_box) in uncore_box_exit()
514 box->pmu->type->ops->exit_box(box); in uncore_box_exit()
520 return (box->dieid < 0); in uncore_box_is_fake()
525 return container_of(event->pmu, struct intel_uncore_pmu, pmu); in uncore_event_to_pmu()
530 return event->pmu_private; in uncore_event_to_box()