Lines Matching full:aligned
118 * ERRORS: HV_EBADALIGN Buffer is badly aligned
125 * aligned. Upon success or HV_EINVAL, this service returns the
250 * stopped state. The supplied RTBA must be aligned on a 256 byte
334 * EBADALIGN Base real address is not correctly aligned
339 * must be a power of 2. The base real address must be aligned
341 * long, so for example a 32 entry queue must be aligned on a 2048
397 * ERRORS: EBADALIGN Mondo data is not 64-byte aligned or CPU list
398 * is not 2-byte aligned.
410 * aligned. The mondo data will be delivered to the cpu_mondo queues
463 * EBADALIGN RTBA is incorrectly aligned for a trap table
466 * The supplied RTBA must be aligned on a 256 byte boundary. Upon
536 * The fault status block is a multiple of 64-bytes and must be aligned
631 * EBADALIGN TSB descriptions pointer is not aligned
633 * within a descriptor is not aligned for
786 * aligned real address specifies where MMU fault status information
802 * aligned to an instruction.
848 * EBADALIGN The buffer pointer is badly aligned
869 * EBADALIGN The buffer pointer is badly aligned
910 * aligned
919 * The real address and length must be aligned on an 8K boundary, or
939 * aligned
945 * returned in RET1. The real address and length must be aligned on
974 * EBADALIGN array not 64B aligned or size not 64B multiple
1029 * EBADALIGN address not 64B aligned
1063 * EBADALIGN address not 64B aligned
1222 * aligned
1234 * of size 32-bytes aligned on a 32-byte boundary. It is treated as a NULL
1256 * aligned
1415 * EBADALIGN Real address not aligned on 64-byte boundary
1419 * base address of the trap trace queue and must be 64-byte aligned.
1428 * If the real address is illegal or badly aligned, then trap tracing
1521 * EBADALIGN Real address is not aligned on a 64-byte
1529 * provided for the domain dump buffer must be 64-byte aligned. The
1542 * address is illegal or badly aligned, then any currently active dump
1850 * tsbid A 64-bit aligned data structure which contains
1879 * must be aligned to the access size.
1929 * EBADALIGN Improperly aligned real address
1945 * Each io_page_address in the io_page_list must be appropriately aligned.
2037 * EBADALIGN pci_config_offset not size aligned
2050 * given pci_config_offset must be 'size' aligned.
2065 * EBADALIGN pci_config_offset not size aligned
2076 * The given pci_config_offset must be 'size' aligned.
2094 * EBADALIGN Improperly aligned real address
2112 * size aligned address.
2130 * EBADALIGN Improperly aligned real address
2155 * size aligned address. The caller must have permission to read from
2223 * EBADALIGN Improperly aligned real address
2228 * number of entries. The real address must be aligned exactly to match
2230 * queue must be aligned on a 2048 byte real address boundary. The MSI-EQ
2504 * A 32-bit aligned list of pci_devices.
2507 * real address of a pci_device_list. 32-bit aligned.
2515 * io_page_list A 64-bit aligned list of real addresses. Each real
2516 * address in an io_page_list must be properly aligned
2519 * io_page_list_p Real address of an io_page_list, 64-bit aligned.
2521 * IOTSB IO Translation Storage Buffer. An aligned table of
2555 * EBADALIGN r_addr is not properly aligned
2563 * r_addr is the properly aligned base address of the IOTSB and size is the
2694 * EBADALIGN Improperly aligned io_page_list_p or I/O page
2710 * The io_page_list_p specifies the real address of the 64-bit-aligned list of
2711 * #iottes I/O page addresses. Each page address must be a properly aligned
2745 * EBADALIGN Improperly aligned r_addr
2855 * The real address base of the queue must be aligned on the queue
2857 * queue must be aligned on a 2048 byte real address boundary.
2926 * must be aligned on a 64 byte boundary, and calculated so as to increase
2949 * The real address base of the queue must be aligned on the queue
2951 * queue must be aligned on a 2048 byte real address boundary.
3018 * must be aligned on a 64 byte boundary, and calculated so as to decrease
3306 * EBADALIGN Real address not aligned on 64-byte boundary
3416 * The real address of the sub-function argument must be aligned on at