Lines Matching defs:mpc85xx_l2ctlr

37 struct mpc85xx_l2ctlr {  struct
38 	u32	ctl;		/* 0x000 - L2 control */
39 	u8	res1[0xC];
40 	u32	ewar0;		/* 0x010 - External write address 0 */
41 	u32	ewarea0;	/* 0x014 - External write address extended 0 */
42 	u32	ewcr0;		/* 0x018 - External write ctrl */
43 	u8	res2[4];
44 	u32	ewar1;		/* 0x020 - External write address 1 */
45 	u32	ewarea1;	/* 0x024 - External write address extended 1 */
46 	u32	ewcr1;		/* 0x028 - External write ctrl 1 */
47 	u8	res3[4];
48 	u32	ewar2;		/* 0x030 - External write address 2 */
49 	u32	ewarea2;	/* 0x034 - External write address extended 2 */
50 	u32	ewcr2;		/* 0x038 - External write ctrl 2 */
51 	u8	res4[4];
52 	u32	ewar3;		/* 0x040 - External write address 3 */
53 	u32	ewarea3;	/* 0x044 - External write address extended 3 */
54 	u32	ewcr3;		/* 0x048 - External write ctrl 3 */
55 	u8	res5[0xB4];
56 	u32	srbar0;		/* 0x100 - SRAM base address 0 */
57 	u32	srbarea0;	/* 0x104 - SRAM base addr reg ext address 0 */
58 	u32	srbar1;		/* 0x108 - SRAM base address 1 */
59 	u32	srbarea1;	/* 0x10C - SRAM base addr reg ext address 1 */
60 	u8	res6[0xCF0];
61 	u32	errinjhi;	/* 0xE00 - Error injection mask high */
62 	u32	errinjlo;	/* 0xE04 - Error injection mask low */
63 	u32	errinjctl;	/* 0xE08 - Error injection tag/ecc control */
64 	u8	res7[0x14];
65 	u32	captdatahi;	/* 0xE20 - Error data high capture */
66 	u32	captdatalo;	/* 0xE24 - Error data low capture */
67 	u32	captecc;	/* 0xE28 - Error syndrome */
68 	u8	res8[0x14];
69 	u32	errdet;		/* 0xE40 - Error detect */
70 	u32	errdis;		/* 0xE44 - Error disable */
71 	u32	errinten;	/* 0xE48 - Error interrupt enable */
72 	u32	errattr;	/* 0xE4c - Error attribute capture */
73 	u32	erradrrl;	/* 0xE50 - Error address capture low */
74 	u32	erradrrh;	/* 0xE54 - Error address capture high */
75 	u32	errctl;		/* 0xE58 - Error control */
76 	u8	res9[0x1A4];