33 	 * the PCI device, but callers don't need that actually as the PE  in get_pci_dev()
95  * Returns the PE assoicated with the PCI device of the given
104 	struct pnv_ioda_pe *pe;  in get_gpu_pci_dev_and_pe()  local
117 	pe = &phb->ioda.pe_array[pdn->pe_number];  in get_gpu_pci_dev_and_pe()
122 	return pe;  in get_gpu_pci_dev_and_pe()
265 	struct pnv_ioda_pe *pe[NV_NPU_MAX_PE_NUM];  member
283 	if (!npucomp->pe_num || !npucomp->pe[0] ||  in pnv_npu_peers_create_table_userspace()
284 			!npucomp->pe[0]->table_group.ops ||  in pnv_npu_peers_create_table_userspace()
285 			!npucomp->pe[0]->table_group.ops->create_table)  in pnv_npu_peers_create_table_userspace()
288 	return npucomp->pe[0]->table_group.ops->create_table(  in pnv_npu_peers_create_table_userspace()
289 			&npucomp->pe[0]->table_group, num, page_shift,  in pnv_npu_peers_create_table_userspace()
302 		struct pnv_ioda_pe *pe = npucomp->pe[i];  in pnv_npu_peers_set_window()  local
304 		if (!pe->table_group.ops->set_window)  in pnv_npu_peers_set_window()
307 		ret = pe->table_group.ops->set_window(&pe->table_group,  in pnv_npu_peers_set_window()
315 			struct pnv_ioda_pe *pe = npucomp->pe[j];  in pnv_npu_peers_set_window()  local
317 			if (!pe->table_group.ops->unset_window)  in pnv_npu_peers_set_window()
320 			ret = pe->table_group.ops->unset_window(  in pnv_npu_peers_set_window()
321 					&pe->table_group, num);  in pnv_npu_peers_set_window()
341 		struct pnv_ioda_pe *pe = npucomp->pe[i];  in pnv_npu_peers_unset_window()  local
348 		if (!pe->table_group.ops->unset_window)  in pnv_npu_peers_unset_window()
351 		ret = pe->table_group.ops->unset_window(&pe->table_group, num);  in pnv_npu_peers_unset_window()
358 			struct pnv_ioda_pe *pe = npucomp->pe[j];  in pnv_npu_peers_unset_window()  local
363 			if (!pe->table_group.ops->set_window)  in pnv_npu_peers_unset_window()
366 			ret = pe->table_group.ops->set_window(&pe->table_group,  in pnv_npu_peers_unset_window()
386 		struct pnv_ioda_pe *pe = npucomp->pe[i];  in pnv_npu_peers_take_ownership()  local
388 		if (!pe->table_group.ops->take_ownership)  in pnv_npu_peers_take_ownership()
390 		pe->table_group.ops->take_ownership(&pe->table_group);  in pnv_npu_peers_take_ownership()
402 		struct pnv_ioda_pe *pe = npucomp->pe[i];  in pnv_npu_peers_release_ownership()  local
404 		if (!pe->table_group.ops->release_ownership)  in pnv_npu_peers_release_ownership()
406 		pe->table_group.ops->release_ownership(&pe->table_group);  in pnv_npu_peers_release_ownership()
420 		struct pnv_ioda_pe *pe)  in pnv_comp_attach_table_group()  argument
425 	npucomp->pe[npucomp->pe_num] = pe;  in pnv_comp_attach_table_group()
430 	pnv_try_setup_npu_table_group(struct pnv_ioda_pe *pe)  in pnv_try_setup_npu_table_group()  argument
438 	list_for_each_entry(gpdev, &pe->pbus->devices, bus_list) {  in pnv_try_setup_npu_table_group()
455 		npucomp = pe->npucomp = kzalloc(sizeof(*npucomp), GFP_KERNEL);  in pnv_try_setup_npu_table_group()
462 				pe->pe_number);  in pnv_try_setup_npu_table_group()
464 		/* Steal capabilities from a GPU PE */  in pnv_try_setup_npu_table_group()
466 			pe->table_group.max_dynamic_windows_supported;  in pnv_try_setup_npu_table_group()
467 		compound_group->tce32_start = pe->table_group.tce32_start;  in pnv_try_setup_npu_table_group()
468 		compound_group->tce32_size = pe->table_group.tce32_size;  in pnv_try_setup_npu_table_group()
469 		compound_group->max_levels = pe->table_group.max_levels;  in pnv_try_setup_npu_table_group()
471 			compound_group->pgsizes = pe->table_group.pgsizes;  in pnv_try_setup_npu_table_group()
476 	 * for the PE. Pull it out now.  in pnv_try_setup_npu_table_group()
482 	* since the table_group for the PE is going to be attached to the  in pnv_try_setup_npu_table_group()
483 	* compound table group. If we leave the PE's iommu group active then  in pnv_try_setup_npu_table_group()
487 	iommu_group_put(pe->table_group.group);  in pnv_try_setup_npu_table_group()
490 	pnv_comp_attach_table_group(npucomp, pe);  in pnv_try_setup_npu_table_group()
496 static struct iommu_table_group *pnv_npu_compound_attach(struct pnv_ioda_pe *pe)  in pnv_npu_compound_attach()  argument
502 	struct pnv_ioda_pe *gpe = get_gpu_pci_dev_and_pe(pe, &gpdev);  in pnv_npu_compound_attach()
504 	WARN_ON(!(pe->flags & PNV_IODA_PE_DEV));  in pnv_npu_compound_attach()
514 	pe->table_group.ops = &pnv_pci_npu_ops;  in pnv_npu_compound_attach()
521 	 * keep only matching. We expect here that NVLink bridge PE pgsizes is  in pnv_npu_compound_attach()
524 	table_group->pgsizes &= pe->table_group.pgsizes;  in pnv_npu_compound_attach()
526 	pnv_comp_attach_table_group(npucomp, pe);  in pnv_npu_compound_attach()
528 	list_for_each_entry(npdev, &pe->phb->hose->bus->devices, bus_list) {  in pnv_npu_compound_attach()
544 	struct pnv_ioda_pe *pe;  in pnv_pci_npu_setup_iommu_groups()  local
547 	 * For non-nvlink devices the IOMMU group is registered when the PE is  in pnv_pci_npu_setup_iommu_groups()
559 			list_for_each_entry(pe, &phb->ioda.pe_list, list)  in pnv_pci_npu_setup_iommu_groups()
560 				pnv_try_setup_npu_table_group(pe);  in pnv_pci_npu_setup_iommu_groups()
576 		list_for_each_entry(pe, &phb->ioda.pe_list, list) {  in pnv_pci_npu_setup_iommu_groups()
582 			pe->table_group.pgsizes = pgsizes;  in pnv_pci_npu_setup_iommu_groups()
583 			pnv_npu_compound_attach(pe);  in pnv_pci_npu_setup_iommu_groups()