48  * First stop state levels when SPR and TB loss can occur.
363 			 * loss. Fast sleep still has to resync the timebase so  in power7_idle_insn()
420 	/* HV state loss */  in power7_idle_insn()
656 		  * after a state-loss idle. Saving and restoring MMCR0  in power9_idle_stop()
740 	 * SRR1_WS_GPRLOSS (10b) can also result in SPR loss, so  in power9_idle_stop()
741 	 * just always test PSSCR for SPR/TB state loss.  in power9_idle_stop()
750 	/* HV state loss */  in power9_idle_stop()
764 		/* TB loss */  in power9_idle_stop()
929 		/* XXX: save SPRs for deep state loss here. */  in power10_idle_stop()
948 	 * SRR1_WS_GPRLOSS (10b) can also result in SPR loss, so  in power10_idle_stop()
949 	 * just always test PSSCR for SPR/TB state loss.  in power10_idle_stop()
958 	/* HV state loss */  in power10_idle_stop()
969 		/* TB loss */  in power10_idle_stop()
1145  *	Bit 42 - Enable State Loss
1147  *	1 - Allows state loss
1217 	 * the deepest loss-less (OPAL_PM_STOP_INST_FAST) stop state.  in pnv_arch300_idle_init()
1226 		/* No deep loss driver implemented for POWER10 yet */  in pnv_arch300_idle_init()
1240 		 * The idle code does not deal with TB loss occurring  in pnv_arch300_idle_init()
1241 		 * in a shallower state than SPR loss, so force it to  in pnv_arch300_idle_init()