49 	struct kvmppc_xive_vcpu *xc = vcpu->arch.xive_vcpu;  in kvmppc_xive_native_cleanup_queue()  local
50 	struct xive_q *q = &xc->queues[prio];  in kvmppc_xive_native_cleanup_queue()
52 	xive_native_disable_queue(xc->vp_id, q, prio);  in kvmppc_xive_native_cleanup_queue()
79 	struct kvmppc_xive_vcpu *xc = vcpu->arch.xive_vcpu;  in kvmppc_xive_native_cleanup_vcpu()  local
85 	if (!xc)  in kvmppc_xive_native_cleanup_vcpu()
88 	pr_devel("native_cleanup_vcpu(cpu=%d)\n", xc->server_num);  in kvmppc_xive_native_cleanup_vcpu()
91 	xc->valid = false;  in kvmppc_xive_native_cleanup_vcpu()
95 	for (i = 0; i < KVMPPC_XIVE_Q_COUNT; i++) {  in kvmppc_xive_native_cleanup_vcpu()
97 		if (xc->esc_virq[i]) {  in kvmppc_xive_native_cleanup_vcpu()
98 			if (xc->xive->single_escalation)  in kvmppc_xive_native_cleanup_vcpu()
99 				xive_cleanup_single_escalation(vcpu, xc,  in kvmppc_xive_native_cleanup_vcpu()
100 							xc->esc_virq[i]);  in kvmppc_xive_native_cleanup_vcpu()
101 			free_irq(xc->esc_virq[i], vcpu);  in kvmppc_xive_native_cleanup_vcpu()
102 			irq_dispose_mapping(xc->esc_virq[i]);  in kvmppc_xive_native_cleanup_vcpu()
103 			kfree(xc->esc_virq_names[i]);  in kvmppc_xive_native_cleanup_vcpu()
104 			xc->esc_virq[i] = 0;  in kvmppc_xive_native_cleanup_vcpu()
109 	xive_native_disable_vp(xc->vp_id);  in kvmppc_xive_native_cleanup_vcpu()
112 	vcpu->arch.xive_cam_word = 0;  in kvmppc_xive_native_cleanup_vcpu()
115 	for (i = 0; i < KVMPPC_XIVE_Q_COUNT; i++) {  in kvmppc_xive_native_cleanup_vcpu()
120 	kfree(xc);  in kvmppc_xive_native_cleanup_vcpu()
131 	struct kvmppc_xive_vcpu *xc = NULL;  in kvmppc_xive_native_connect_vcpu()  local
152 	xc = kzalloc(sizeof(*xc), GFP_KERNEL);  in kvmppc_xive_native_connect_vcpu()
153 	if (!xc) {  in kvmppc_xive_native_connect_vcpu()
158 	vcpu->arch.xive_vcpu = xc;  in kvmppc_xive_native_connect_vcpu()
159 	xc->xive = xive;  in kvmppc_xive_native_connect_vcpu()
160 	xc->vcpu = vcpu;  in kvmppc_xive_native_connect_vcpu()
161 	xc->server_num = server_num;  in kvmppc_xive_native_connect_vcpu()
163 	xc->vp_id = vp_id;  in kvmppc_xive_native_connect_vcpu()
164 	xc->valid = true;  in kvmppc_xive_native_connect_vcpu()
167 	rc = xive_native_get_vp_info(xc->vp_id, &xc->vp_cam, &xc->vp_chip_id);  in kvmppc_xive_native_connect_vcpu()
177 	rc = xive_native_enable_vp(xc->vp_id, xive->single_escalation);  in kvmppc_xive_native_connect_vcpu()
184 	vcpu->arch.xive_saved_state.w01 = cpu_to_be64(0xff000000);  in kvmppc_xive_native_connect_vcpu()
185 	vcpu->arch.xive_cam_word = cpu_to_be32(xc->vp_cam | TM_QW1W2_VO);  in kvmppc_xive_native_connect_vcpu()
212 	pr_debug("clearing esb pages for girq 0x%lx\n", irq);  in kvmppc_xive_native_reset_mapped()
219 	return 0;  in kvmppc_xive_native_reset_mapped()
291 	case 0: /* HW - forbid access */  in xive_native_tima_fault()
334 	return 0;  in kvmppc_xive_native_mmap()
347 	pr_devel("%s irq=0x%lx\n", __func__, irq);  in kvmppc_xive_native_set_source()
376 		if (state->ipi_number == 0) {  in kvmppc_xive_native_set_source()
383 		pr_debug("%s allocated hw_irq=0x%x for irq=0x%lx\n", __func__,  in kvmppc_xive_native_set_source()
396 	state->act_server = 0;  in kvmppc_xive_native_set_source()
399 	xive_native_configure_irq(state->ipi_number, 0, MASKED, 0);  in kvmppc_xive_native_set_source()
406 	rc = 0;  in kvmppc_xive_native_set_source()
422 	int rc = 0;  in kvmppc_xive_native_update_source_config()
450 		state->act_server = 0;  in kvmppc_xive_native_update_source_config()
451 		state->eisn = 0;  in kvmppc_xive_native_update_source_config()
453 		rc = xive_native_configure_irq(hw_num, 0, MASKED, 0);  in kvmppc_xive_native_update_source_config()
486 	pr_devel("%s irq=0x%lx cfg=%016llx\n", __func__, irq, kvm_cfg);  in kvmppc_xive_native_set_source_config()
515 	int rc = 0;  in kvmppc_xive_native_sync_source()
517 	pr_devel("%s irq=0x%lx", __func__, irq);  in kvmppc_xive_native_sync_source()
532 		rc = 0;  in kvmppc_xive_native_sync_source()
546 	case 0: /* EQ reset */  in xive_native_validate_queue_size()
548 		return 0;  in xive_native_validate_queue_size()
562 	struct kvmppc_xive_vcpu *xc;  in kvmppc_xive_native_set_queue_config()  local
568 	__be32 *qaddr = 0;  in kvmppc_xive_native_set_queue_config()
591 	xc = vcpu->arch.xive_vcpu;  in kvmppc_xive_native_set_queue_config()
598 	q = &xc->queues[priority];  in kvmppc_xive_native_set_queue_config()
606 		q->guest_qaddr  = 0;  in kvmppc_xive_native_set_queue_config()
607 		q->guest_qshift = 0;  in kvmppc_xive_native_set_queue_config()
609 		rc = kvmppc_xive_native_configure_queue(xc->vp_id, q, priority,  in kvmppc_xive_native_set_queue_config()
610 							NULL, 0, true);  in kvmppc_xive_native_set_queue_config()
613 			       priority, xc->server_num, rc);  in kvmppc_xive_native_set_queue_config()
617 		return 0;  in kvmppc_xive_native_set_queue_config()
676 	rc = kvmppc_xive_native_configure_queue(xc->vp_id, q, priority,  in kvmppc_xive_native_set_queue_config()
680 		       priority, xc->server_num, rc);  in kvmppc_xive_native_set_queue_config()
689 	if (kvm_eq.qtoggle != 1 || kvm_eq.qindex != 0) {  in kvmppc_xive_native_set_queue_config()
690 		rc = xive_native_set_queue_state(xc->vp_id, priority,  in kvmppc_xive_native_set_queue_config()
710 	struct kvmppc_xive_vcpu *xc;  in kvmppc_xive_native_get_queue_config()  local
736 	xc = vcpu->arch.xive_vcpu;  in kvmppc_xive_native_get_queue_config()
743 	q = &xc->queues[priority];  in kvmppc_xive_native_get_queue_config()
745 	memset(&kvm_eq, 0, sizeof(kvm_eq));  in kvmppc_xive_native_get_queue_config()
748 		return 0;  in kvmppc_xive_native_get_queue_config()
750 	rc = xive_native_get_queue_info(xc->vp_id, priority, &qaddr, &qshift,  in kvmppc_xive_native_get_queue_config()
755 	kvm_eq.flags = 0;  in kvmppc_xive_native_get_queue_config()
762 	rc = xive_native_get_queue_state(xc->vp_id, priority, &kvm_eq.qtoggle,  in kvmppc_xive_native_get_queue_config()
774 	return 0;  in kvmppc_xive_native_get_queue_config()
781 	for (i = 0; i < KVMPPC_XICS_IRQ_PER_ICS; i++) {  in kvmppc_xive_reset_sources()
790 		state->eisn = 0;  in kvmppc_xive_reset_sources()
791 		state->act_server = 0;  in kvmppc_xive_reset_sources()
794 		xive_native_configure_irq(state->ipi_number, 0, MASKED, 0);  in kvmppc_xive_reset_sources()
798 						  0, MASKED, 0);  in kvmppc_xive_reset_sources()
814 		struct kvmppc_xive_vcpu *xc = vcpu->arch.xive_vcpu;  in kvmppc_xive_reset()  local
817 		if (!xc)  in kvmppc_xive_reset()
822 		for (prio = 0; prio < KVMPPC_XIVE_Q_COUNT; prio++) {  in kvmppc_xive_reset()
828 			if (xc->esc_virq[prio]) {  in kvmppc_xive_reset()
829 				free_irq(xc->esc_virq[prio], vcpu);  in kvmppc_xive_reset()
830 				irq_dispose_mapping(xc->esc_virq[prio]);  in kvmppc_xive_reset()
831 				kfree(xc->esc_virq_names[prio]);  in kvmppc_xive_reset()
832 				xc->esc_virq[prio] = 0;  in kvmppc_xive_reset()
839 	for (i = 0; i <= xive->max_sbid; i++) {  in kvmppc_xive_reset()
851 	return 0;  in kvmppc_xive_reset()
858 	for (j = 0; j < KVMPPC_XICS_IRQ_PER_ICS; j++) {  in kvmppc_xive_native_sync_sources()
891 	struct kvmppc_xive_vcpu *xc = vcpu->arch.xive_vcpu;  in kvmppc_xive_native_vcpu_eq_sync()  local
895 	if (!xc)  in kvmppc_xive_native_vcpu_eq_sync()
898 	for (prio = 0; prio < KVMPPC_XIVE_Q_COUNT; prio++) {  in kvmppc_xive_native_vcpu_eq_sync()
899 		struct xive_q *q = &xc->queues[prio];  in kvmppc_xive_native_vcpu_eq_sync()
909 	return 0;  in kvmppc_xive_native_vcpu_eq_sync()
921 	for (i = 0; i <= xive->max_sbid; i++) {  in kvmppc_xive_native_eq_sync()
936 	return 0;  in kvmppc_xive_native_eq_sync()
993 			return 0;  in kvmppc_xive_native_has_attr()
1001 			return 0;  in kvmppc_xive_native_has_attr()
1004 		return 0;  in kvmppc_xive_native_has_attr()
1066 	for (i = 0; i <= xive->max_sbid; i++) {  in kvmppc_xive_native_release()
1120 	return 0;  in kvmppc_xive_native_create()
1127 #define TM_IPB_MASK  (((u64) 0xFF) << TM_IPB_SHIFT)
1131 	struct kvmppc_xive_vcpu *xc = vcpu->arch.xive_vcpu;  in kvmppc_xive_native_get_vp()  local
1138 	if (!xc)  in kvmppc_xive_native_get_vp()
1142 	val->xive_timaval[0] = vcpu->arch.xive_saved_state.w01;  in kvmppc_xive_native_get_vp()
1145 	rc = xive_native_get_vp_state(xc->vp_id, &opal_state);  in kvmppc_xive_native_get_vp()
1153 	val->xive_timaval[0] |= cpu_to_be64(opal_state & TM_IPB_MASK);  in kvmppc_xive_native_get_vp()
1164 	return 0;  in kvmppc_xive_native_get_vp()
1169 	struct kvmppc_xive_vcpu *xc = vcpu->arch.xive_vcpu;  in kvmppc_xive_native_set_vp()  local
1173 		 val->xive_timaval[0], val->xive_timaval[1]);  in kvmppc_xive_native_set_vp()
1178 	if (!xc || !xive)  in kvmppc_xive_native_set_vp()
1189 	vcpu->arch.xive_saved_state.w01 = val->xive_timaval[0];  in kvmppc_xive_native_set_vp()
1196 	return 0;  in kvmppc_xive_native_set_vp()
1212 		return 0;  in xive_native_debug_show()
1217 		struct kvmppc_xive_vcpu *xc = vcpu->arch.xive_vcpu;  in xive_native_debug_show()  local
1219 		if (!xc)  in xive_native_debug_show()
1223 			   xc->server_num, xc->vp_id,  in xive_native_debug_show()
1234 	return 0;  in xive_native_debug_show()