Lines Matching +full:reserved +full:- +full:cpu +full:- +full:vectors
1 /* SPDX-License-Identifier: GPL-2.0-or-later */
4 * Copyright (C) 1995-1996 Gary Thomas (gdt@linuxppc.org)
9 * Low-level exception handlers and MMU support
14 * This file contains the low-level support and setup for the
28 #include <asm/asm-offsets.h>
33 #include <asm/feature-fixups.h>
38 /* see the comment for clear_bats() -- Cort */ \
66 * -- Cort
78 * pointer (r1) points to just below the end of the half-meg region
79 * from 0x380000 - 0x400000, which is mapped in already.
93 * r5: initrd_end - unused if r4 is 0
99 * -- Cort
116 addis r8,r8,(_stext - 0b)@ha
117 addi r8,r8,(_stext - 0b)@l /* current runtime base addr */
139 li r24,0 /* cpu # */
143 * the necessary low-level setup and clears the BSS
144 * -- Cort <cort@fsmlabs.com>
173 * Call setup_cpu for CPU 0 and initialize 6xx Idle
176 li r24,0 /* cpu# */
177 bl call_setup_cpu /* Call setup_cpu for this CPU */
185 * the exception vectors at 0 (and therefore this copy
186 * overwrites OF's exception vectors with our own).
199 * as we jump to our code at KERNELBASE. -- Cort
217 li r3,1 /* MTX only has 1 cpu */
227 /* our cpu # was at addr 0 - go */
228 mr r24,r3 /* cpu # */
239 .long -1
253 * a non-zero value, the address of the exception frame to use,
255 * and uses its value if it is non-zero.
258 * -- paulus.
332 rlwinm r3, r5, 32 - 15, 21, 21 /* DSISR_STORE -> _PAGE_RW */
393 /* Floating-point unavailable */
431 * non-altivec kernel running on a machine with altivec just
444 * Note: we get an alternate set of r0 - r3 to use automatically.
451 * r2: ptr to linux-style pte
454 /* Get PTE (linux-style) and check access */
463 bgt- 112f
464 lis r2, (swapper_pg_dir - PAGE_OFFSET)@ha /* if kernel address, use */
465 addi r2, r2, (swapper_pg_dir - PAGE_OFFSET)@l /* kernel page table */
470 beq- InstructionAddressInvalid /* return if no mapping */
472 lwz r0,0(r2) /* get linux-style pte */
474 bne- InstructionAddressInvalid /* return if access not permitted */
475 /* Convert linux-style PTE to low word of PPC-style PTE */
476 rlwimi r0,r0,32-2,31,31 /* _PAGE_USER -> PP lsb */
477 ori r1, r1, 0xe06 /* clear out reserved bits */
498 rlwimi r2,r2,1,30,30 /* change 1 -> 3 */
515 * r2: ptr to linux-style pte
518 /* Get PTE (linux-style) and check access */
524 bgt- 112f
525 lis r2, (swapper_pg_dir - PAGE_OFFSET)@ha /* if kernel address, use */
526 addi r2, r2, (swapper_pg_dir - PAGE_OFFSET)@l /* kernel page table */
530 beq- DataAddressInvalid /* return if no mapping */
532 lwz r0,0(r2) /* get linux-style pte */
534 bne- DataAddressInvalid /* return if access not permitted */
539 /* Convert linux-style PTE to low word of PPC-style PTE */
540 rlwinm r1,r0,32-9,30,30 /* _PAGE_RW -> PP msb */
541 rlwimi r0,r0,32-1,30,30 /* _PAGE_USER -> PP msb */
542 rlwimi r0,r0,32-1,31,31 /* _PAGE_USER -> PP lsb */
543 ori r1,r1,0xe04 /* clear out reserved bits */
560 rlwimi r2,r0,31-14,14,14
591 * r2: ptr to linux-style pte
594 /* Get PTE (linux-style) and check access */
600 bgt- 112f
601 lis r2, (swapper_pg_dir - PAGE_OFFSET)@ha /* if kernel address, use */
602 addi r2, r2, (swapper_pg_dir - PAGE_OFFSET)@l /* kernel page table */
606 beq- DataAddressInvalid /* return if no mapping */
608 lwz r0,0(r2) /* get linux-style pte */
610 bne- DataAddressInvalid /* return if access not permitted */
615 /* Convert linux-style PTE to low word of PPC-style PTE */
616 rlwimi r0,r0,32-2,31,31 /* _PAGE_USER -> PP lsb */
617 li r1,0xe06 /* clear out reserved bits & PP msb */
634 rlwimi r2,r0,31-14,14,14
731 rlwinm r3, r3, 32 - 15, _PAGE_RW /* DSISR_STORE -> _PAGE_RW */
796 addis r25,r25,-KERNELBASE@h
815 addi r5,r5,-4
816 addi r6,r6,-4
839 mr r24, r3 /* cpu # */
854 set to map the 0xf0000000 - 0xffffffff region */
862 /* Copy some CPU settings from CPU 0 */
865 lis r3,-KERNELBASE@h
867 bl call_setup_cpu /* Call setup_cpu for this CPU */
868 lis r3,-KERNELBASE@h
879 addi r1,r1,THREAD_SIZE-STACK_FRAME_OVERHEAD
892 lis r4, (swapper_pg_dir - PAGE_OFFSET)@h
893 ori r4, r4, (swapper_pg_dir - PAGE_OFFSET)@l
920 lis r6, early_hash - PAGE_OFFSET@h
971 li r0, 16 - NUM_USER_SEGMENTS /* load up kernel segment registers */
989 /* Set up for using our exception vectors */
994 lis r4, (swapper_pg_dir - PAGE_OFFSET)@h
995 ori r4, r4, (swapper_pg_dir - PAGE_OFFSET)@l
1002 stwu r0,THREAD_SIZE-STACK_FRAME_OVERHEAD(r1)
1004 * Do early platform-specific initialization,
1020 * and change to using our exception vectors.
1064 blt- 4f
1108 * -- Cort
1130 /* Here's a tweak: at this point, CPU setup have
1192 1: addic. r10, r10, -0x1000
1199 addi r4, r3, __after_mmu_off - _start
1306 addis r6,r6,-KERNELBASE@h
1320 * We put a few things here that have to be page-aligned.
1322 * which is page-aligned.