powerpc/kernel/head_40x.S

8  *      Low-level exception handers, MMU support, and rewrite.
80  * critical exception prolog.
96  * Exception prolog for critical exceptions.  This is a little different
97  * from the normal exception prolog above since a critical exception
98  * can potentially occur at any point during normal exception processing.
126 	stw	r9,_ESR(r11);		/* exception was taken		   */\
134 	lis	r10, STACK_FRAME_REGS_MARKER@ha; /* exception frame marker */\
145 	 *	now phys stack/exception frame pointer
154  * Exception vectors.
164  * 0x0100 - Critical Interrupt Exception
169  * 0x0200 - Machine Check Exception
174  * 0x0300 - Data Storage Exception
189  * 0x0400 - Instruction Storage Exception
199 /* 0x0500 - External Interrupt Exception */
200 	EXCEPTION(0x0500, HardwareInterrupt, do_IRQ, EXC_XFER_LITE)
202 /* 0x0600 - Alignment Exception */
210 /* 0x0700 - Program Exception */
218 	EXCEPTION(0x0800, Trap_08, unknown_exception, EXC_XFER_STD)
219 	EXCEPTION(0x0900, Trap_09, unknown_exception, EXC_XFER_STD)
220 	EXCEPTION(0x0A00, Trap_0A, unknown_exception, EXC_XFER_STD)
221 	EXCEPTION(0x0B00, Trap_0B, unknown_exception, EXC_XFER_STD)
223 /* 0x0C00 - System Call Exception */
226 /*	Trap_0D is commented out to get more space for system call exception */
228 /*	EXCEPTION(0x0D00, Trap_0D, unknown_exception, EXC_XFER_STD) */
229 	EXCEPTION(0x0E00, Trap_0E, unknown_exception, EXC_XFER_STD)
230 	EXCEPTION(0x0F00, Trap_0F, unknown_exception, EXC_XFER_STD)
232 /* 0x1000 - Programmable Interval Timer (PIT) Exception */
236 /* 0x1010 - Fixed Interval Timer (FIT) Exception
241 /* 0x1020 - Watchdog Timer (WDT) Exception
246 /* 0x1100 - Data TLB Miss Exception
316 	/* The bailout.  Restore registers to pre-exception conditions
328 /* 0x1200 - Instruction TLB Miss Exception
397 	/* The bailout.  Restore registers to pre-exception conditions
409 	EXCEPTION(0x1300, Trap_13, unknown_exception, EXC_XFER_STD)
410 	EXCEPTION(0x1400, Trap_14, unknown_exception, EXC_XFER_STD)
411 	EXCEPTION(0x1500, Trap_15, unknown_exception, EXC_XFER_STD)
412 	EXCEPTION(0x1600, Trap_16, unknown_exception, EXC_XFER_STD)
413 	EXCEPTION(0x1700, Trap_17, unknown_exception, EXC_XFER_STD)
414 	EXCEPTION(0x1800, Trap_18, unknown_exception, EXC_XFER_STD)
415 	EXCEPTION(0x1900, Trap_19, unknown_exception, EXC_XFER_STD)
416 	EXCEPTION(0x1A00, Trap_1A, unknown_exception, EXC_XFER_STD)
417 	EXCEPTION(0x1B00, Trap_1B, unknown_exception, EXC_XFER_STD)
418 	EXCEPTION(0x1C00, Trap_1C, unknown_exception, EXC_XFER_STD)
419 	EXCEPTION(0x1D00, Trap_1D, unknown_exception, EXC_XFER_STD)
420 	EXCEPTION(0x1E00, Trap_1E, unknown_exception, EXC_XFER_STD)
421 	EXCEPTION(0x1F00, Trap_1F, unknown_exception, EXC_XFER_STD)
423 /* Check for a single step debug exception while in an exception
426  * an exception (eg ITLB/DTLB miss) and thus the first instruction of
427  * the exception handler generates a single step debug exception.
429  * If we get a debug trap on the first instruction of an exception handler,
431  * a critical exception, so we are using SPRN_CSRR1 to manipulate the MSR).
432  * The exception handler was handling a non-critical interrupt, so it will
436 	/* 0x2000 - Debug Exception */
441 	 * If this is a single step or branch-taken exception in an
442 	 * exception entry sequence, it was probably meant to apply to
443 	 * the code where the exception occurred (since exception entry
445 	 * of turning off DE on entry to an exception handler by turning
457 	bgt+    2f			/* address above exception vectors */
459 	/* here it looks like we got an inappropriate debug exception. */
477 	/* continue normal handling for a critical exception... */
484 	/* Programmable Interval Timer (PIT) Exception. (from 0x1000) */
488 	mtspr	SPRN_TSR,r0		/* Clear the PIT exception */
492 	/* Fixed Interval Timer (FIT) Exception. (from 0x1010) */
498 	/* Watchdog Timer (WDT) Exception. (from 0x1020) */
513 	 * exception space :-).  Both the instruction and data TLB
588  * and change to using our exception vectors.
668 	/* Establish the exception vector base